Dear Chanwoo,
On 2017-11-30 10:35, Marek Szyprowski wrote:
On 2017-11-30 03:51, Chanwoo Choi wrote:
On 2017년 11월 30일 11:20, Chanwoo Choi wrote:
On 2017년 11월 29일 20:26, Marek Szyprowski wrote:
This patch adds support for MSCL power domain to Exynos 5433 SoCs,
which
contains following devices: a clock controller, JPEG codec device
and its
SYSMMU.
Signed-off-by: Marek Szyprowski <m.szyprowski@xxxxxxxxxxx>
---
arch/arm64/boot/dts/exynos/exynos5433.dtsi | 10 ++++++++++
1 file changed, 10 insertions(+)
Looks good to me.
Reviewed-by: Chanwoo Choi <cw00.choi@xxxxxxxxxxx>
[snip]
When I tested this patch with enabling exynos-bus.c,
I got the following external abort. In order to fix this abort,
I add the power-domain property to
arch/arm64/boot/dts/exynos/exynos5433-bus.dtsi
as following:
Thanks for this report. You are right that exynos-bus devices should be
also added to respective power domains. I will also check how to add
runtime PM support and awareness of power domain to exynos-bus driver,
to avoid blocking respective power domains in turned on state.
I've investigated it further and it turned out to be a missing case in
my runtime PM patch for clocks core.
In this case exynos-bus operates on a clock, which is in the
TOP CMU and TOP power domain (always on), which has no relation with
the newly added MSCL power domain. We should not mix this by forcing
exynos-bus to be in the MSCL domain.
The reported external abort is solved by proper patch for clock core:
https://patchwork.kernel.org/patch/10084725/
This patch (and the other patches from this patch series) can be applied
without any changes.
Best regards
--
Marek Szyprowski, PhD
Samsung R&D Institute Poland
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