On 09/19, Marek Szyprowski wrote:
> Commit 6edfa11cb396 ("clk: samsung: Add enable/disable operation for
> PLL36XX clocks") added enable/disable operations to PLL clocks. Prior that
> VPLL and EPPL clocks were always enabled because the enable bit was never
> touched. Those clocks have to be enabled during suspend/resume cycle,
> because otherwise board fails to enter sleep mode. This patch enables them
> unconditionally before entering system suspend state. System restore
> function will set them to the previous state saved in the register cache
> done before that unconditional enable.
>
> Fixes: 6edfa11cb396 ("clk: samsung: Add enable/disable operation for PLL36XX clocks")
> CC: stable@xxxxxxxxxxxxxxx # v4.13
> Signed-off-by: Marek Szyprowski <m.szyprowski@xxxxxxxxxxx>
> Reviewed-by: Chanwoo Choi <cw00.choi@xxxxxxxxxxx>
> Reviewed-by: Krzysztof Kozlowski <krzk@xxxxxxxxxx>
> Acked-by: Sylwester Nawrocki <s.nawrocki@xxxxxxxxxxx>
> ---
Applied to clk-fixes
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