Hi All,
On 2017-09-19 12:28, Sylwester Nawrocki wrote:
On 09/19/2017 12:01 PM, Marek Szyprowski wrote:
Commit 6edfa11cb396 ("clk: samsung: Add enable/disable operation for
PLL36XX clocks") added enable/disable operations to PLL clocks. Prior
that
VPLL and EPPL clocks were always enabled because the enable bit was
never
touched. Those clocks have to be enabled during suspend/resume cycle,
because otherwise board fails to enter sleep mode. This patch enables
them
unconditionally before entering system suspend state. System restore
function will set them to the previous state saved in the register cache
done before that unconditional enable.
Fixes: 6edfa11cb396 ("clk: samsung: Add enable/disable operation for
PLL36XX clocks")
CC: stable@xxxxxxxxxxxxxxx # v4.13
Signed-off-by: Marek Szyprowski <m.szyprowski@xxxxxxxxxxx>
Reviewed-by: Chanwoo Choi <cw00.choi@xxxxxxxxxxx>
Reviewed-by: Krzysztof Kozlowski <krzk@xxxxxxxxxx>
Acked-by: Sylwester Nawrocki <s.nawrocki@xxxxxxxxxxx>
Stephen, Mike, could you please apply this patch directly?
Gentle ping.
Any chance to have this patch merged as a fix to v4.14-rcX?
> ...
Best regards
--
Marek Szyprowski, PhD
Samsung R&D Institute Poland
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