Hi Marek, On 12 September 2017 at 17:27, Marek Szyprowski <m.szyprowski@xxxxxxxxxxx> wrote: > From: Brian Kim <brian.kim@xxxxxxxxxxxxxx> > > The power button (SW2) on Odroid XU3/4 is connected to the PWRON pin > of the S2MPS11 PMIC. > > The S2MPS11 datasheet says that ONOB pin operates as 'PWRON key active > low signal'. In fact, S2MPS11 PMIC acts as a 16ms debouce filter and > signal inverter, thus effectively repeating PWRON (active high) to ONOB > pin (active low). > > ONOB PMIC pin is then connected to XEINT3 SoC pin, so we get the state > of the power button on the gpx0-3 GPIO. > > This patch adds device-tree bindings for the power button of Odroid > XU3/4 boards. > > Signed-off-by: Brian Kim <brian.kim@xxxxxxxxxxxxxx> > [mszyprow: extended commit message, added comments and fixed minor > issues in the dts] > Signed-off-by: Marek Szyprowski <m.szyprowski@xxxxxxxxxxx> > --- > Changelog: > > v2: fixed minor issues pointed by Krzysztof Kozlowski: > - added comments to dts > - extended commit message > - removed useless interrupts property > - used proper macros for gpios > - removed gpio prefix > > v1: initial submission > https://patchwork.kernel.org/patch/9605023/ > Please add my Reviewed-by: Anand Moon <linux.amoon@xxxxxxxxx> Tested-by: Anand Moon <linux.amoon@xxxxxxxxx> Best Regards -Anand Moon -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
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