Hello,
On 12/19/2016 03:30 PM, Marek Szyprowski wrote:
UART modules can use DMA for offloading data transfers and reducing
interrupts, so enable this feature for Exynos5 boards. Tested on
Google ChromeBook Snow (Exynos5250), Odroid XU (Exynos5410) and Odroid
XU3 (Exynos5422) boards.
Signed-off-by: Marek Szyprowski <m.szyprowski@xxxxxxxxxxx>
---
v3:
- added Exynos5410
make failed with this patch with below error:
DTC arch/arm/boot/dts/exynos5410-odroidxu.dtb
ERROR (phandle_references): Reference to non-existent node or label "pdma0"
ERROR (phandle_references): Reference to non-existent node or label "pdma0"
ERROR (phandle_references): Reference to non-existent node or label "pdma1"
ERROR (phandle_references): Reference to non-existent node or label "pdma1"
ERROR (phandle_references): Reference to non-existent node or label "pdma0"
ERROR (phandle_references): Reference to non-existent node or label "pdma0"
ERROR (phandle_references): Reference to non-existent node or label "pdma1"
ERROR (phandle_references): Reference to non-existent node or label "pdma1"
ERROR: Input tree has errors, aborting (use -f to force output)
make[1]: *** [arch/arm/boot/dts/exynos5410-odroidxu.dtb] Error 2
make: *** [dtbs] Error 2
-------------------------------------
I tried building against linux-next with tag v4.9.
69973b8 Linux 4.9
2e4333c Merge branch 'upstream' of
git://git.linux-mips.org/pub/scm/ralf/upstream-linus
ba73515 MIPS: Lantiq: Fix mask of GPE frequency
Let me know if I am missing other patches.
- fixed serial 1/2 again, in v2 they were incorrectly swaped as a result
of my hurry in patch posting
v2:
- added Exynos5250
- fixed copy/paste typo for serial 2 and 3
---
arch/arm/boot/dts/exynos5250.dtsi | 8 ++++++++
arch/arm/boot/dts/exynos5410.dtsi | 8 ++++++++
arch/arm/boot/dts/exynos5420.dtsi | 8 ++++++++
3 files changed, 24 insertions(+)
diff --git a/arch/arm/boot/dts/exynos5250.dtsi b/arch/arm/boot/dts/exynos5250.dtsi
index b6d7444..0e04460 100644
--- a/arch/arm/boot/dts/exynos5250.dtsi
+++ b/arch/arm/boot/dts/exynos5250.dtsi
@@ -1043,21 +1043,29 @@
&serial_0 {
clocks = <&clock CLK_UART0>, <&clock CLK_SCLK_UART0>;
clock-names = "uart", "clk_uart_baud0";
+ dmas = <&pdma0 13>, <&pdma0 14>;
+ dma-names = "rx", "tx";
};
&serial_1 {
clocks = <&clock CLK_UART1>, <&clock CLK_SCLK_UART1>;
clock-names = "uart", "clk_uart_baud0";
+ dmas = <&pdma1 15>, <&pdma1 16>;
+ dma-names = "rx", "tx";
};
&serial_2 {
clocks = <&clock CLK_UART2>, <&clock CLK_SCLK_UART2>;
clock-names = "uart", "clk_uart_baud0";
+ dmas = <&pdma0 15>, <&pdma0 16>;
+ dma-names = "rx", "tx";
};
&serial_3 {
clocks = <&clock CLK_UART3>, <&clock CLK_SCLK_UART3>;
clock-names = "uart", "clk_uart_baud0";
+ dmas = <&pdma1 17>, <&pdma1 18>;
+ dma-names = "rx", "tx";
};
#include "exynos5250-pinctrl.dtsi"
diff --git a/arch/arm/boot/dts/exynos5410.dtsi b/arch/arm/boot/dts/exynos5410.dtsi
index 2b6adaf..7eab4bc 100644
--- a/arch/arm/boot/dts/exynos5410.dtsi
+++ b/arch/arm/boot/dts/exynos5410.dtsi
@@ -340,21 +340,29 @@
&serial_0 {
clocks = <&clock CLK_UART0>, <&clock CLK_SCLK_UART0>;
clock-names = "uart", "clk_uart_baud0";
+ dmas = <&pdma0 13>, <&pdma0 14>;
+ dma-names = "rx", "tx";
};
&serial_1 {
clocks = <&clock CLK_UART1>, <&clock CLK_SCLK_UART1>;
clock-names = "uart", "clk_uart_baud0";
+ dmas = <&pdma1 15>, <&pdma1 16>;
+ dma-names = "rx", "tx";
};
&serial_2 {
clocks = <&clock CLK_UART2>, <&clock CLK_SCLK_UART2>;
clock-names = "uart", "clk_uart_baud0";
+ dmas = <&pdma0 15>, <&pdma0 16>;
+ dma-names = "rx", "tx";
};
&serial_3 {
clocks = <&clock CLK_UART3>, <&clock CLK_SCLK_UART3>;
clock-names = "uart", "clk_uart_baud0";
+ dmas = <&pdma1 17>, <&pdma1 18>;
+ dma-names = "rx", "tx";
};
&sss {
diff --git a/arch/arm/boot/dts/exynos5420.dtsi b/arch/arm/boot/dts/exynos5420.dtsi
index 906a1a4..0154c2e 100644
--- a/arch/arm/boot/dts/exynos5420.dtsi
+++ b/arch/arm/boot/dts/exynos5420.dtsi
@@ -1406,21 +1406,29 @@
&serial_0 {
clocks = <&clock CLK_UART0>, <&clock CLK_SCLK_UART0>;
clock-names = "uart", "clk_uart_baud0";
+ dmas = <&pdma0 13>, <&pdma0 14>;
+ dma-names = "rx", "tx";
};
&serial_1 {
clocks = <&clock CLK_UART1>, <&clock CLK_SCLK_UART1>;
clock-names = "uart", "clk_uart_baud0";
+ dmas = <&pdma1 15>, <&pdma1 16>;
+ dma-names = "rx", "tx";
};
&serial_2 {
clocks = <&clock CLK_UART2>, <&clock CLK_SCLK_UART2>;
clock-names = "uart", "clk_uart_baud0";
+ dmas = <&pdma0 15>, <&pdma0 16>;
+ dma-names = "rx", "tx";
};
&serial_3 {
clocks = <&clock CLK_UART3>, <&clock CLK_SCLK_UART3>;
clock-names = "uart", "clk_uart_baud0";
+ dmas = <&pdma1 17>, <&pdma1 18>;
+ dma-names = "rx", "tx";
};
&sss {
--
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