Hi,
On Monday, December 19, 2016 03:16:27 AM Tobias Jakobi wrote:
> Both DMC and leftbus adjust regulator voltages (MIF and INT
> respectively), which have to be in a safe range to allow the
> BL0 to operate correctly.
>
> Signed-off-by: Tobias Jakobi <tjakobi@xxxxxxxxxxxxxxxxxxxxx>
> ---
> arch/arm/boot/dts/exynos4412-prime.dtsi | 2 ++
Could you please post patch(es) adding this file? I'm planning to fix
OPPs for Exynos4412-Prime and don't wont to duplicate efforts.
Also please remember to mention in the cover letter the tree that your
patchset is based on (if it is different than the mainline).
Best regards,
--
Bartlomiej Zolnierkiewicz
Samsung R&D Institute Poland
Samsung Electronics
> 1 file changed, 2 insertions(+)
>
> diff --git a/arch/arm/boot/dts/exynos4412-prime.dtsi b/arch/arm/boot/dts/exynos4412-prime.dtsi
> index 97d1b9c..18e411f 100644
> --- a/arch/arm/boot/dts/exynos4412-prime.dtsi
> +++ b/arch/arm/boot/dts/exynos4412-prime.dtsi
> @@ -123,6 +123,7 @@
> opp@400000000 {
> opp-hz = /bits/ 64 <400000000>;
> opp-microvolt = <1100000>;
> + opp-suspend;
> };
> };
>
> @@ -145,6 +146,7 @@
> opp@200000000 {
> opp-hz = /bits/ 64 <200000000>;
> opp-microvolt = <1150000>;
> + opp-suspend;
> };
> };
--
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