On Fri, Dec 16, 2016 at 01:39:00PM +0100, Marek Szyprowski wrote:
> UART modules can use DMA for offloading data transfers and reducing
> interrupts, so enable this feature for Exynos5 boards. Tested on
> Google ChromeBook Snow (Exynos5250) and Odroid XU3 (Exynos5422) boards.
>
> Signed-off-by: Marek Szyprowski <m.szyprowski@xxxxxxxxxxx>
> ---
> v2:
> - added Exynos5250
> - fixed copy/paste typo for serial 2 and 3
> ---
> arch/arm/boot/dts/exynos5250.dtsi | 8 ++++++++
> arch/arm/boot/dts/exynos5420.dtsi | 8 ++++++++
> 2 files changed, 16 insertions(+)
>
On Exynos4412 enabling DMA for serial exposed some interesting bugs so I
assume here the fun will start after applying? :)
Looks good, what about Exynos5410?
Best regards,
Krzysztof
> diff --git a/arch/arm/boot/dts/exynos5250.dtsi b/arch/arm/boot/dts/exynos5250.dtsi
> index 255b7c891d59..fc7ae8e557cc 100644
> --- a/arch/arm/boot/dts/exynos5250.dtsi
> +++ b/arch/arm/boot/dts/exynos5250.dtsi
> @@ -1047,21 +1047,29 @@
> &serial_0 {
> clocks = <&clock CLK_UART0>, <&clock CLK_SCLK_UART0>;
> clock-names = "uart", "clk_uart_baud0";
> + dmas = <&pdma0 13>, <&pdma0 14>;
> + dma-names = "rx", "tx";
> };
>
> &serial_1 {
> clocks = <&clock CLK_UART1>, <&clock CLK_SCLK_UART1>;
> clock-names = "uart", "clk_uart_baud0";
> + dmas = <&pdma0 15>, <&pdma0 16>;
> + dma-names = "rx", "tx";
> };
>
> &serial_2 {
> clocks = <&clock CLK_UART2>, <&clock CLK_SCLK_UART2>;
> clock-names = "uart", "clk_uart_baud0";
> + dmas = <&pdma1 15>, <&pdma1 16>;
> + dma-names = "rx", "tx";
> };
>
> &serial_3 {
> clocks = <&clock CLK_UART3>, <&clock CLK_SCLK_UART3>;
> clock-names = "uart", "clk_uart_baud0";
> + dmas = <&pdma1 17>, <&pdma1 18>;
> + dma-names = "rx", "tx";
> };
>
> #include "exynos5250-pinctrl.dtsi"
> diff --git a/arch/arm/boot/dts/exynos5420.dtsi b/arch/arm/boot/dts/exynos5420.dtsi
> index bb90326e53d2..f5468bbe8f13 100644
> --- a/arch/arm/boot/dts/exynos5420.dtsi
> +++ b/arch/arm/boot/dts/exynos5420.dtsi
> @@ -1422,21 +1422,29 @@
> &serial_0 {
> clocks = <&clock CLK_UART0>, <&clock CLK_SCLK_UART0>;
> clock-names = "uart", "clk_uart_baud0";
> + dmas = <&pdma0 13>, <&pdma0 14>;
> + dma-names = "rx", "tx";
> };
>
> &serial_1 {
> clocks = <&clock CLK_UART1>, <&clock CLK_SCLK_UART1>;
> clock-names = "uart", "clk_uart_baud0";
> + dmas = <&pdma0 15>, <&pdma0 16>;
> + dma-names = "rx", "tx";
> };
>
> &serial_2 {
> clocks = <&clock CLK_UART2>, <&clock CLK_SCLK_UART2>;
> clock-names = "uart", "clk_uart_baud0";
> + dmas = <&pdma1 15>, <&pdma1 16>;
> + dma-names = "rx", "tx";
> };
>
> &serial_3 {
> clocks = <&clock CLK_UART3>, <&clock CLK_SCLK_UART3>;
> clock-names = "uart", "clk_uart_baud0";
> + dmas = <&pdma1 17>, <&pdma1 18>;
> + dma-names = "rx", "tx";
> };
>
> &sss {
> --
> 1.9.1
>
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