Arnd, Olof, On 01/08/16 10:54, Marc Zyngier wrote: > The ARM architected timer specification mandates that the interrupt > associated with each timer is level triggered (which corresponds to > the "counter >= comparator" condition). > > A number of DTs are being remarkably creative, declaring the interrupt > to be edge triggered. A quick look at the TRM for the corresponding ARM > CPUs clearly shows that this is wrong, and I've corrected those. > For non-ARM designs (and in the absence of a publicly available TRM), > I've made them active low as well, which can't be completely wrong > as the GIC cannot disinguish between level low and level high. > > The respective maintainers are of course welcome to prove me wrong. > > While I was at it, I took the liberty to fix a couple of related issue, > such as some spurious affinity bits on ThunderX, and their complete > absence on ls1043a (both of which seem to be related to copy-pasting > from other DTs). > > Acked-by: Duc Dang <dhdang@xxxxxxx> > Acked-by: Carlo Caione <carlo@xxxxxxxxxxxx> > Acked-by: Michal Simek <michal.simek@xxxxxxxxxx> > Acked-by: Krzysztof Kozlowski <k.kozlowski@xxxxxxxxxxx> > Acked-by: Dinh Nguyen <dinguyen@xxxxxxxxxxxxxxxxxxxxx> > Signed-off-by: Marc Zyngier <marc.zyngier@xxxxxxx> Any update on this patch? We have a workaround merged already, but it'd be good to have the DTS fixed as well. Thanks, M. -- Jazz is not dead. It just smells funny... -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
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