The 'sd0_rclk' was put in the middle of SD1 nodes. Remove the confusion.
Signed-off-by: Krzysztof Kozlowski <krzk@xxxxxxxxxx>
---
arch/arm/boot/dts/exynos5420-pinctrl.dtsi | 12 ++++++------
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/arch/arm/boot/dts/exynos5420-pinctrl.dtsi b/arch/arm/boot/dts/exynos5420-pinctrl.dtsi
index 130563b2ca95..14beb7e07323 100644
--- a/arch/arm/boot/dts/exynos5420-pinctrl.dtsi
+++ b/arch/arm/boot/dts/exynos5420-pinctrl.dtsi
@@ -193,17 +193,17 @@
samsung,pin-drv = <3>;
};
- sd1_clk: sd1-clk {
- samsung,pins = "gpc1-0";
+ sd0_rclk: sd0-rclk {
+ samsung,pins = "gpc0-7";
samsung,pin-function = <2>;
- samsung,pin-pud = <0>;
+ samsung,pin-pud = <1>;
samsung,pin-drv = <3>;
};
- sd0_rclk: sd0-rclk {
- samsung,pins = "gpc0-7";
+ sd1_clk: sd1-clk {
+ samsung,pins = "gpc1-0";
samsung,pin-function = <2>;
- samsung,pin-pud = <1>;
+ samsung,pin-pud = <0>;
samsung,pin-drv = <3>;
};
--
2.5.0
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