On 01/30/2016 03:11 PM, Chanho Park wrote:
> From: Chanho Park <chanho61.park@xxxxxxxxxxx>
>
> This patch supports mipi dsi for exynos5422. The dsi register
> offsets of the exynos5422 are similar with exynos5433. However,
> the values of the registers are quite different from the
> exynos5433. For example, the exynos5422 uses sw reset like
> previous chips.
>
> Cc: Inki Dae <inki.dae@xxxxxxxxxxx>
> Cc: Joonyoung Shim <jy0922.shim@xxxxxxxxxxx>
> Cc: Seung-Woo Kim <sw0312.kim@xxxxxxxxxxx>
> Signed-off-by: Chanho Park <chanho61.park@xxxxxxxxxxx>
Reviewed-by: Andrzej Hajda <a.hajda@xxxxxxxxxxx>
--
Regards
Andrzej
> ---
> .../bindings/display/exynos/exynos_dsim.txt | 1 +
> drivers/gpu/drm/exynos/exynos_drm_dsi.c | 31 ++++++++++++++++++++++
> 2 files changed, 32 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/display/exynos/exynos_dsim.txt b/Documentation/devicetree/bindings/display/exynos/exynos_dsim.txt
> index 0e6f0c0..22756b3 100644
> --- a/Documentation/devicetree/bindings/display/exynos/exynos_dsim.txt
> +++ b/Documentation/devicetree/bindings/display/exynos/exynos_dsim.txt
> @@ -6,6 +6,7 @@ Required properties:
> "samsung,exynos4210-mipi-dsi" /* for Exynos4 SoCs */
> "samsung,exynos4415-mipi-dsi" /* for Exynos4415 SoC */
> "samsung,exynos5410-mipi-dsi" /* for Exynos5410/5420/5440 SoCs */
> + "samsung,exynos5422-mipi-dsi" /* for Exynos5422/5800 SoCs */
> "samsung,exynos5433-mipi-dsi" /* for Exynos5433 SoCs */
> - reg: physical base address and length of the registers set for the device
> - interrupts: should contain DSI interrupt
> diff --git a/drivers/gpu/drm/exynos/exynos_drm_dsi.c b/drivers/gpu/drm/exynos/exynos_drm_dsi.c
> index d84a498..3eff6bf 100644
> --- a/drivers/gpu/drm/exynos/exynos_drm_dsi.c
> +++ b/drivers/gpu/drm/exynos/exynos_drm_dsi.c
> @@ -408,6 +408,24 @@ static unsigned int reg_values[] = {
> [PHYTIMING_HS_TRAIL] = DSIM_PHYTIMING2_HS_TRAIL(0x0b),
> };
>
> +static unsigned int exynos5422_reg_values[] = {
> + [RESET_TYPE] = DSIM_SWRST,
> + [PLL_TIMER] = 500,
> + [STOP_STATE_CNT] = 0xf,
> + [PHYCTRL_ULPS_EXIT] = DSIM_PHYCTRL_ULPS_EXIT(0xaf),
> + [PHYCTRL_VREG_LP] = 0,
> + [PHYCTRL_SLEW_UP] = 0,
> + [PHYTIMING_LPX] = DSIM_PHYTIMING_LPX(0x08),
> + [PHYTIMING_HS_EXIT] = DSIM_PHYTIMING_HS_EXIT(0x0d),
> + [PHYTIMING_CLK_PREPARE] = DSIM_PHYTIMING1_CLK_PREPARE(0x09),
> + [PHYTIMING_CLK_ZERO] = DSIM_PHYTIMING1_CLK_ZERO(0x30),
> + [PHYTIMING_CLK_POST] = DSIM_PHYTIMING1_CLK_POST(0x0e),
> + [PHYTIMING_CLK_TRAIL] = DSIM_PHYTIMING1_CLK_TRAIL(0x0a),
> + [PHYTIMING_HS_PREPARE] = DSIM_PHYTIMING2_HS_PREPARE(0x0c),
> + [PHYTIMING_HS_ZERO] = DSIM_PHYTIMING2_HS_ZERO(0x11),
> + [PHYTIMING_HS_TRAIL] = DSIM_PHYTIMING2_HS_TRAIL(0x0d),
> +};
> +
> static unsigned int exynos5433_reg_values[] = {
> [RESET_TYPE] = DSIM_FUNCRST,
> [PLL_TIMER] = 22200,
> @@ -482,6 +500,17 @@ static struct exynos_dsi_driver_data exynos5433_dsi_driver_data = {
> .reg_values = exynos5433_reg_values,
> };
>
> +static struct exynos_dsi_driver_data exynos5422_dsi_driver_data = {
> + .reg_ofs = exynos5433_reg_ofs,
> + .plltmr_reg = 0xa0,
> + .has_clklane_stop = 1,
> + .num_clks = 2,
> + .max_freq = 1500,
> + .wait_for_reset = 1,
> + .num_bits_resol = 12,
> + .reg_values = exynos5422_reg_values,
> +};
> +
> static struct of_device_id exynos_dsi_of_match[] = {
> { .compatible = "samsung,exynos3250-mipi-dsi",
> .data = &exynos3_dsi_driver_data },
> @@ -491,6 +520,8 @@ static struct of_device_id exynos_dsi_of_match[] = {
> .data = &exynos4415_dsi_driver_data },
> { .compatible = "samsung,exynos5410-mipi-dsi",
> .data = &exynos5_dsi_driver_data },
> + { .compatible = "samsung,exynos5422-mipi-dsi",
> + .data = &exynos5422_dsi_driver_data },
> { .compatible = "samsung,exynos5433-mipi-dsi",
> .data = &exynos5433_dsi_driver_data },
> { }
>
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