Hi Krzysztof, Am 08.05.2015 um 10:14 schrieb Krzysztof Kozlowski: > On 08.05.2015 16:41, Markus Reichl wrote: >> HS400 timing values are added for exynos5422-odroidxu3 board. >> >> Signed-off-by: Markus Reichl <m.reichl@xxxxxxxxxxxxx> Tested-by: >> Anand Moon <linux.amoon@xxxxxxxxx> > > Once again, I did not see email from Anand. > >> --- This patch is analog to [0], which is applied already. This >> patch needs [0] for the pin-ctrl definition of sd0_rclk. >> >> [0]: >> https://www.mail-archive.com/linux-samsung-soc%40vger.kernel.org/msg42902.html >> >> > --- >> arch/arm/boot/dts/exynos5422-odroidxu3.dts | 7 ++++++- 1 file >> changed, 6 insertions(+), 1 deletion(-) >> >> diff --git a/arch/arm/boot/dts/exynos5422-odroidxu3.dts >> b/arch/arm/boot/dts/exynos5422-odroidxu3.dts index a519c86..0408ec0 >> 100644 --- a/arch/arm/boot/dts/exynos5422-odroidxu3.dts +++ >> b/arch/arm/boot/dts/exynos5422-odroidxu3.dts @@ -298,15 +298,20 @@ >> >> &mmc_0 { status = "okay"; + num-slots = <1>; > > This looks unrelated... If it is really not needed for HS400 then > please prepare separate patch. I will come up with a 2. version after Anand's tag and split these. > >> broken-cd; card-detect-delay = <200>; samsung,dw-mshc-ciu-div = >> <3>; samsung,dw-mshc-sdr-timing = <0 4>; samsung,dw-mshc-ddr-timing >> = <0 2>; + samsung,dw-mshc-hs400-timing = <0 2>; + >> samsung,read-strobe-delay = <90>; pinctrl-names = "default"; - >> pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_bus4 &sd0_bus8>; + pinctrl-0 = >> <&sd0_clk &sd0_cmd &sd0_bus1 &sd0_bus4 &sd0_bus8 &sd0_rclk>; > > Did you checked this with board schematics? Yes, I checked that the sd0_rclk is connected to gpc0-7 as in base patch. > > A reviewed-by tag from someone would be nice. > > Best regards, > Krzysztof > > Best Regards, -- Markus Reichl
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