Add PDMA0,PDMA1 gate clock, required clks for 5 SPI channels and for clks in audio block. This patchset is dependent on usb clk support from Vivek in below link. http://www.spinics.net/lists/linux-samsung-soc/msg39342.html Changes since V1: - Added documentation for source clks of peric1 block. - Changed the parent of sclk_i2s1_user,sclk_pcm1_user and sclk_spdif_user from divider clk to gate clk. - Removed unused clk IDs Padmavathi Venna (3): clk: samsung: exynos7: add gate clock for DMA block clk: samsung: exynos7: add clocks for SPI block clk: samsung: exynos7: add clocks for audio block .../devicetree/bindings/clock/exynos7-clock.txt | 14 ++ drivers/clk/samsung/clk-exynos7.c | 220 +++++++++++++++++++- include/dt-bindings/clock/exynos7-clk.h | 43 ++++- 3 files changed, 271 insertions(+), 6 deletions(-) -- 1.7.4.4 -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
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