Hi Abhilash,
On Wednesday 10 December 2014 10:46 AM, Sudeep Holla wrote:
On Wednesday 10 December 2014 09:55 AM, Abhilash Kesavan wrote:
Hi Sudeep,
On Wed, Dec 10, 2014 at 9:44 AM, Sudeep Holla <sudeep.holla@xxxxxxx> wrote:
Hi Abhilash,
On Wednesday 10 December 2014 09:31 AM, Abhilash Kesavan wrote:
Hi,
On Fri, Nov 28, 2014 at 8:20 PM, Abhilash Kesavan <a.kesavan@xxxxxxxxxxx>
wrote:
The arm-cci driver completes the probe sequence even if the cci node is
marked as disabled. Add a check in the driver to honour the cci status
in the device tree.
Signed-off-by: Abhilash Kesavan <a.kesavan@xxxxxxxxxxx>
This patch helps disable CCI on the Arndale Octa board thus resolving
some imprecise aborts seen on that board. Kindly review.
Regards,
Abhilash
---
drivers/bus/arm-cci.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/bus/arm-cci.c b/drivers/bus/arm-cci.c
index 860da40..0ce5e2d 100644
--- a/drivers/bus/arm-cci.c
+++ b/drivers/bus/arm-cci.c
@@ -1312,6 +1312,9 @@ static int cci_probe(void)
if (!np)
return -ENODEV;
+ if (!of_device_is_available(np))
+ return -ENODEV;
+
IIUC, by this change you are disabling the MCPM boot protocol here.
Is there any alternative boot protocol that works on this platform
to boot all 8 cores ? Sorry by quick grep couldn't find one, hence
so I am asking.
Thanks for the reply.
On disabling MCPM, we will default to platsmp.c/firmware.c which boots
4 cores as per Kevin's comment here[1]. This was the original behavior
before MCPM was enabled for all 5420 based SoCs.
Thanks for pointing that out. I assume the firmware can handle the
alternate boot protocol and no more workarounds are needed especially
when getting CPUIdle working in this mode.
Anyways the patch makes sense irrespective how it works on exynos, so
you can add,
Acked-by: Sudeep Holla <sudeep.holla@xxxxxxx>
What's the status of this patch. It was useful for me on vexpress for
some testing. Please feel free to add
Tested-by: Sudeep Holla <sudeep.holla@xxxxxxx>
if this is not yet queued.
Regards,
Sudeep
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