On wto, 2014-11-25 at 15:52 +0100, Javier Martinez Canillas wrote: > Hello Krzysztof, > > On 11/25/2014 03:22 PM, Krzysztof Kozlowski wrote: > >> Any ideas? > > > > Yes, I got. On Peach board the i2s0 is enabled in DTS. Probing it could > > fail because it relies on enabling audss clocks (which cannot be > > accessed). > > > > I reproduced another hang on Arndale Octa after enabling i2s0 in DTS. > > Maybe that is the cause also on Peach. > > > > You are correct, if I disable i2s0 then I see the logs from > clk_disable_unused_subtree() and boot hangs when accessing the adma clock: > > clk: checking dout_fimd1 > clk: checking mout_fimd1_final > clk: checking mout_fimd1 > clk: checking mout_sclk_rpll > clk: checking fout_rpll > clk: checking adma > > With i2s0 disabled, your series are indeed enough to make it boot again but > as you said enabling i2s0 in the DTS makes it hang even with your patches. > > Thanks a lot for digging into this! My patch only fixed the gate clocks but it didn't touched div and mux. I'll prepare a v2 of it (I got some feedback) which I hope will fix both cases: i2s and disabling unused clocks. Best regards, Krzysztof -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html