On Wed, Sep 10, 2014 at 10:37 AM, Sylwester Nawrocki <s.nawrocki@xxxxxxxxxxx> wrote: > The default mux and divider clocks are specified in device tree > so that the FIMC devices in Exynos4210 and Exynos4x12 SoCs are > clocked from recommended clock source and with maximum supported > frequency. If needed these settings could be overrode in board > specific dts files, however they are in practice optimal in most > cases. Another consideration for this patch. fimc-core.c already has probe-time code that tries to set the clock frequency, using a clock-frequency property in the DT, and falling back to a hardcoded value in the driver. Maybe it is best to just set the clock rate from one place. Daniel -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
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