On 2014년 08월 07일 18:09, Thierry Reding wrote: > On Thu, Aug 07, 2014 at 04:51:18PM +0900, Inki Dae wrote: >> On 2014년 08월 07일 15:58, Thierry Reding wrote: >>> On Thu, Aug 07, 2014 at 02:09:19AM +0900, Inki Dae wrote: >>>> 2014-08-06 16:43 GMT+09:00 Thierry Reding <thierry.reding@xxxxxxxxx>: > [...] >>>>> As far as I can tell non-continuous mode simply means that the host can >>>>> turn off the HS clock after a high-speed transmission. I think Andrzej >>>>> mentioned this already in another subthread, but this is an optional >>>>> mode that peripherals can support if they have extra circuitry that >>>>> provides an internal clock. Peripherals that don't have such circuitry >>>>> may rely on the HS clock to perform in between transmissions and >>>>> therefore require the HS clock to be always on (continuous mode). That's >>>>> what the MIPI_DSI_CLOCK_NON_CONTINUOUS flag is: it advertises that the >>>>> peripheral supports non-continuous mode and therefore the host can turn >>>>> the HS clock off after high-speed transmissions. >>>> >>>> What I don't make sure is this sentence. With >>>> MIPI_DSI_CLOCK_NON_CONTIUOUS flag, I guess two possible operations. >>>> One is, >>>> 1. host controller will generates signals if a bit of a register >>>> related to non-contiguous clock mode is set or unset. >>>> 2. And then video data is transmitted to panel in HS mode. >>>> 3. And then D-PHY detects LP-11 signal (positive and negative lane all >>>> are high). >>>> 4. And then D-PHY disables HS clock of host controller. >>>> 5. At this time, operation mode of host controller becomes LPM. >>>> >>>> Other is, >>>> 1. host controller will generates signals if a bit of a register >>>> related to non-contiguous clock mode is set or unset. >>>> 2. And then D-PHY detects LP-11 signal (positive and negative lane all >>>> are high). >>>> 3. And then video data is transmitted to panel in LPM. >>>> 4. At this time, operation mode of host controller becomes LPM. >>>> >>>> It seems that you says latter case. >>> >>> No. High speed clock and low power mode are orthogonal. Non-continuous >>> mode simply means that the clock lane enters LP-11 between HS >>> transmissions (see 5.6 "Clock Management" of the DSI specification). >>> >> >> It seems that clock lane enters LP-11 regardless of HS clock enabled if >> non-continous mode is used. Right? > > No, I think as long as HS clock is enabled the clock lane won't enter > LP-11. Non-continuous mode means that the controller can disable the HS > clock between HS transmissions. So in non-continuous mode the clock lane > can enter LP-11 because the controller disables the HS clock. It makes me a little bit confusing. You said "if HS clock is enabled, the the clock lane won't enter LP-11" But you said again "the clock lane can enter LP-11 because the controller disables the HS clock" What is the meaning? > > In continuous mode, then the clock will never be disabled, hence the > clock lane will never enter LP-11. > >> And also it seems that non-continous mode is different from LPM at all >> because with non-continuous mode, command data is transmitted to panel >> in HS mode, but with LPM, command data is transmitted to panel in LP >> mode. Also right? > > No. I think you can send command data to the peripheral in low power > mode in both continuous and non-continuous clock modes. > >> If so, shouldn't the host driver disable HS clock, in case of LP mode, >> before the host driver transmits command data? > > No. If the peripheral doesn't support non-continuous mode, then the HS > clock must never be turned off. On the other hand, if the peripheral > supports non-continuous mode, then the DSI host should automatically > disable the HS clock between high-speed transmissions. That means if a > packet is transmitted in low power mode the DSI host will not be > transmitting in high-speed mode and therefore disable the HS clock. What is LPM you think? I thought LPM is LP-11 and HS clock disabled. So for LPM transfer, lanes should be LP-11 state and also HS clock of the host controller should be disabled. Your comment, "if a packet is transmitted in low power mode the DSI host will not be transmitting in high-speed mode and therefor disable the HS clock" would mean same as my question. > > Obviously if the controller can't do that automatically then it might be > necessary to explicitly do that in the driver. But I doubt that any DSI > controller wouldn't be able to do that automatically. On Tegra we have a > control bit that enables non-continuous mode: > > DSI_HS_CLK_CTRL: control for the HS clock lane > - 0 = CONTINUOUS: HS clock is on all the time > - 1 = TX_ONLY: HS clock is only active during HS transmissions MIPI-DSI of Exynos SoC also has similar bit but the spec doesn't describe it enough. Thanks for information. I will try to get more information about above comments from HW guys if I can contact them. Thanks, Inki Dae > >> And it seems that only one of these two flags, MSG_LPM and NON-CONTINUOUS, >> should be set by panel driver because with NON-CONTINUOUS clock mode, host >> controller generate clock and data lane signals regardless of controlling >> HS clock. > > No. Non-continuous mode is something that's specific to the peripheral > and is always valid, whereas the MSG_LPM flag is only used to mark a > packet to be transmitted in low power mode (as opposed to high speed > mode). For peripherals that don't support non-continuous mode the > NON_CONTINUOUS flag needs to be set. But the driver for the peripheral > can still initiate low power mode packet transmissions by setting the > MSG_LPM flag. > > Thierry > -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
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