On Mon, Jul 21, 2014 at 6:40 PM, Bartlomiej Zolnierkiewicz
<b.zolnierkie@xxxxxxxxxxx> wrote:
>
> Hi,
>
> On Monday, July 21, 2014 01:43:53 PM Daniel Drake wrote:
>> On Fri, Jul 18, 2014 at 5:00 PM, Bartlomiej Zolnierkiewicz
>> <b.zolnierkie@xxxxxxxxxxx> wrote:
>> > Recent patch by Tomasz Figa ("irqchip: gic: Fix core ID calculation
>> > when topology is read from DT") fixed GIC driver to filter cluster ID
>> > from values returned by cpu_logical_map() for SoCs having registers
>> > mapped without per-CPU banking making it is possible to add CPU nodes
>> > for Exynos4 SoCs. In case of Exynos SoCs these CPU nodes are also
>> > required by future changes adding initialization of cpuidle states in
>> > Exynos cpuidle driver through DT.
>>
>> This conflicts with work in the thread "cpufreq: use generic cpufreq
>> drivers for exynos platforms" which is already in its 7th iteration.
>> Perhaps best to work directly with Thomas to help him finish that series?
>
> Patch "[PATCH v7 4/6] ARM: dts: Exynos: add cpu nodes, opp and cpu clock
> configuration data" from Thomas needs another revision anyway since it lacks
> cluster ID in Exynos4210 CPU node. It also mixes addition of CPU nodes
> with cpufreq specific changes and IMHO addition of CPU nodes should be in
> separate patch to ease bisection if any later problems turn up. Therefore
> I think that it would be the best if Thomas would rebase his work on top of
> "irqchip: gic: Fix core ID calculation when topology is read from DT" patch
> and this one. Thomas, are you okay with this?
Hi Bartlomiej,
Yes, I am okay with this.
Regards,
Thomas.
>
> Best regards,
> --
> Bartlomiej Zolnierkiewicz
> Samsung R&D Institute Poland
> Samsung Electronics
>
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