On 2014년 05월 22일 17:39, Rahul Sharma wrote:
> On 22 May 2014 12:25, Inki Dae <inki.dae@xxxxxxxxxxx> wrote:
>> On 2014년 05월 22일 13:36, Rahul Sharma wrote:
>>> Hi Inki,
>>>
>>> On 21 May 2014 16:43, Inki Dae <inki.dae@xxxxxxxxxxx> wrote:
>>>>
>>>> Hi Rahul,
>>>>
>>>> On 2014년 05월 07일 20:25, Rahul Sharma wrote:
>>>>> From: Rahul Sharma <Rahul.Sharma@xxxxxxxxxxx>
>>>>>
>>>>> In case of exynos, setting dma-burst to 16Word causes permanent
>>>>> tearing for very small buffers, e.g. cursor buffer. Burst Mode
>>>>> switching, which is based on overlay size is not recommended as
>>>>> overlay size varies a lot towards the end of the screen. This
>>>>> causes unstable DMA which results into tearing again.
>>> [snip]
>>>>> + /*
>>>>> + * In case of exynos, setting dma-burst to 16Word causes permanent
>>>>> + * tearing for very small buffers, e.g. cursor buffer. Burst Mode
>>>>> + * switching which is based on overlay size is not recommended as
>>>>> + * overlay size varies alot towards the end of the screen and rapid
>>>>> + * movement causes unstable DMA which results into iommu crash/tear.
>>>>
>>>> FIMD has width limitation so width of hardware overlay may need to be
>>>> aligned to 16 pixels.
>>>> We had faced with similar issue and the issue had been resolved by
>>>> aligning it to 16 pixels.
>>>>
>>>> So can you try to align it instead of changing burst len size?
>>>>
>>>
>>> This problem is only with the very small FBs which are
>>> rendered towards corners. For large FBs like 1366x768,
>>> we dont see this issue though 1366 is not 16 pixel
>>> aligned.
>>
>> Right, we had test it with 8x64 pixels. the limitation would be decided
>> by memory bus length(ML), DMA burst length(DL) and pixel size in bytes(PS).
>> And that can be calculated like below, which was guided by hardware team,
>>
>> Align { (ML * DI / PS) + (4bytes / PS), 2}
>
> What will be the value for ML in Exynos? 4, I guess ?
>
>>
>> It seems too big value. Actually, 16 pixels works well and I don't see
>> why it works well although out of limitation.
>
> Actually Peach Pit and Peach Pi, native LCD resolution is 1366x768
> which has no issues.
>
> In above experiments, I rendered FB of size 96*64 which corrupts when
> overlay width reduces beyond 48 Pixels for 5420, 5800 and 64 for 5250.
>
> Probably we have not tested rendering the Small buffers (<96 Pixels) with
> 16 bit DMA burst and towards end of FB. As if now, this scenario only
> applicable for Chrome which is having cursor.
>
> Please let me know how to proceed further.
>
As we had a discussion about this, there is no right solution but one
issue. So merged it temporarily until we could find the right solution
that can consider memory bus length of all Exynos SoC: the limitation
would have dependency of memory bus length of SoC.
Thanks,
Inki Dae
> Regards,
> Rahul Sharma.
>
>>
>> Thanks,
>> Inki Dae
>>
>>>
>>> But I still carried out following experiments just to
>>> verify the fimd behaviour for small overlay.
>>>
>>> 1) Round DOWN:
>>> + overlay->crtc_width = ((overlay->crtc_width)/16)*16;
>>>
>>> Cursor corruption from A to B
>>> A: [ 308.530000] start addr = 0x20408000, end addr = 0x2040e000, size = 0x6000
>>> [ 308.530000] ovl_width = 64, ovl_height = 64
>>> [ 308.540000] offset_x = 1302, offset_y = 335
>>> [ 308.540000] fb_width = 96, fb_height = 64
>>>
>>> B: [ 341.890000] start addr = 0x20408000, end addr = 0x2040e000, size = 0x6000
>>> [ 341.890000] ovl_width = 48, ovl_height = 64
>>> [ 341.900000] offset_x = 1303, offset_y = 335
>>> [ 341.900000] fb_width = 96, fb_height = 64
>>>
>>>
>>> 2) Round UP:
>>>
>>> + overlay->crtc_width = ((overlay->crtc_width + 16)/16)*16;
>>> + if(overlay->crtc_width > overlay->fb_width)
>>> + overlay->crtc_width = overlay->fb_width;
>>>
>>> Cursor corruption from A to B
>>> A: [ 63.200000] start addr = 0x20408000, end addr = 0x2040e000, size = 0x6000
>>> [ 63.210000] ovl_width = 96, ovl_height = 64
>>> [ 63.210000] offset_x = 1271, offset_y = 346
>>> [ 63.220000] fb_width = 96, fb_height = 64
>>>
>>> B: [ 68.600000] start addr = 0x20408000, end addr = 0x2040e000, size = 0x6000
>>> [ 68.610000] ovl_width = 96, ovl_height = 64
>>> [ 68.610000] offset_x = 1272, offset_y = 346
>>> [ 68.620000] fb_width = 96, fb_height = 64
>>>
>>> In both the scenarios ovl_width is always 16 Pixel aligned.
>>> Please let me know if you have something else in mind. I
>>> will check and share the observations.
>>>
>>> The solution in the patch is proposed by hardware team
>>> and work fine for exynos 5250, 5420 and 5800.
>>>
>>> Regards,
>>> Rahul Sharma
>>>
>>>> Thanks,
>>>> Inki Dae
>>>>
>>>>> + */
>>>>> +
>>>>> + if (win_data->fb_width < MIN_FB_WIDTH_FOR_16WORD_BURST) {
>>>>> + val &= ~WINCONx_BURSTLEN_MASK;
>>>>> + val |= WINCONx_BURSTLEN_4WORD;
>>>>> + }
>>>>> +
>>>>> writel(val, ctx->regs + WINCON(win));
>>>>> }
>>>>>
>>>>>
>>>>
>>>
>>
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>
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