On 5 May 2014 09:37, Chander Kashyap <chander.kashyap@xxxxxxxxxx> wrote:
> On 25 April 2014 11:14, Chander Kashyap <chander.kashyap@xxxxxxxxxx> wrote:
>> The address of cpu power registers in pmu is based on cpu number
>> offsets. This function calculate the same. This is essentially
>> required in case of multicluster SoC's e.g Exynos5420.
>>
>> Signed-off-by: Chander Kashyap <chander.kashyap@xxxxxxxxxx>
>> Signed-off-by: Chander Kashyap <k.chander@xxxxxxxxxxx>
>> ---
>> arch/arm/mach-exynos/regs-pmu.h | 9 +++++++++
>> 1 file changed, 9 insertions(+)
>>
>> diff --git a/arch/arm/mach-exynos/regs-pmu.h b/arch/arm/mach-exynos/regs-pmu.h
>> index 4f6a256..217da2e 100644
>> --- a/arch/arm/mach-exynos/regs-pmu.h
>> +++ b/arch/arm/mach-exynos/regs-pmu.h
>> @@ -313,4 +313,13 @@
>>
>> #define EXYNOS5_OPTION_USE_RETENTION (1 << 4)
>>
>> +#include <asm/cputype.h>
>> +#define MAX_CPUS_IN_CLUSTER 4
>> +
>> +static inline unsigned int exynos_pmu_cpunr(unsigned int mpidr)
>> +{
>> + return ((MPIDR_AFFINITY_LEVEL(mpidr, 1) * MAX_CPUS_IN_CLUSTER)
>> + + MPIDR_AFFINITY_LEVEL(mpidr, 0));
>> +}
>> +
>> #endif /* __ASM_ARCH_REGS_PMU_H */
>> --
>> 1.7.9.5
>>
>
> Kukjin, Can you please have a look.
>
>
>
> --
> with warm regards,
> Chander Kashyap
Hi Kgene,
Can you take this patch if no issues with it.
--
with warm regards,
Chander Kashyap
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