The code to initiate and exit the powerdown sequence is the same in pm.c and
cpuidle.c.
Let's split the common part in the pm.c and reuse it from the cpu_pm notifier.
That is one more step forward to make the cpuidle driver arch indenpendant.
Signed-off-by: Daniel Lezcano <daniel.lezcano@xxxxxxxxxx>
Reviewed-by: Viresh Kumar <viresh.kumar@xxxxxxxxxx>
---
arch/arm/mach-exynos/cpuidle.c | 21 ---------------------
arch/arm/mach-exynos/pm.c | 22 ++++++++++++++++++----
2 files changed, 18 insertions(+), 25 deletions(-)
diff --git a/arch/arm/mach-exynos/cpuidle.c b/arch/arm/mach-exynos/cpuidle.c
index 01444ed..81d7197 100644
--- a/arch/arm/mach-exynos/cpuidle.c
+++ b/arch/arm/mach-exynos/cpuidle.c
@@ -76,31 +76,10 @@ static int exynos_enter_core0_aftr(struct cpuidle_device *dev,
struct cpuidle_driver *drv,
int index)
{
- unsigned long tmp;
-
- /* Setting Central Sequence Register for power down mode */
- tmp = __raw_readl(S5P_CENTRAL_SEQ_CONFIGURATION);
- tmp &= ~S5P_CENTRAL_LOWPWR_CFG;
- __raw_writel(tmp, S5P_CENTRAL_SEQ_CONFIGURATION);
-
cpu_pm_enter();
cpu_suspend(0, idle_finisher);
cpu_pm_exit();
- /*
- * If PMU failed while entering sleep mode, WFI will be
- * ignored by PMU and then exiting cpu_do_idle().
- * S5P_CENTRAL_LOWPWR_CFG bit will not be set automatically
- * in this situation.
- */
- tmp = __raw_readl(S5P_CENTRAL_SEQ_CONFIGURATION);
- if (!(tmp & S5P_CENTRAL_LOWPWR_CFG)) {
- tmp |= S5P_CENTRAL_LOWPWR_CFG;
- __raw_writel(tmp, S5P_CENTRAL_SEQ_CONFIGURATION);
- /* Clear wakeup state register */
- __raw_writel(0x0, S5P_WAKEUP_STAT);
- }
-
return index;
}
diff --git a/arch/arm/mach-exynos/pm.c b/arch/arm/mach-exynos/pm.c
index c8b3dc4..0e73591 100644
--- a/arch/arm/mach-exynos/pm.c
+++ b/arch/arm/mach-exynos/pm.c
@@ -184,15 +184,19 @@ static void exynos_pm_prepare(void)
__raw_writel(virt_to_phys(exynos_cpu_resume), S5P_INFORM0);
}
-static int exynos_pm_suspend(void)
+static void exynos_pm_central_suspend(void)
{
unsigned long tmp;
/* Setting Central Sequence Register for power down mode */
-
tmp = __raw_readl(S5P_CENTRAL_SEQ_CONFIGURATION);
tmp &= ~S5P_CENTRAL_LOWPWR_CFG;
__raw_writel(tmp, S5P_CENTRAL_SEQ_CONFIGURATION);
+}
+
+static int exynos_pm_suspend(void)
+{
+ unsigned long tmp;
/* Setting SEQ_OPTION register */
@@ -205,7 +209,7 @@ static int exynos_pm_suspend(void)
return 0;
}
-static void exynos_pm_resume(void)
+static int exynos_pm_central_resume(void)
{
unsigned long tmp;
@@ -222,9 +226,17 @@ static void exynos_pm_resume(void)
/* clear the wakeup state register */
__raw_writel(0x0, S5P_WAKEUP_STAT);
/* No need to perform below restore code */
- goto early_wakeup;
+ return -1;
}
+ return 0;
+}
+
+static void exynos_pm_resume(void)
+{
+ if (exynos_pm_central_resume())
+ goto early_wakeup;
+
if (!soc_is_exynos5250())
exynos_cpu_restore_register();
@@ -336,6 +348,7 @@ static int exynos_cpu_pm_notifier(struct notifier_block *self,
switch (cmd) {
case CPU_PM_ENTER:
if (cpu == 0) {
+ exynos_pm_central_suspend();
exynos_cpu_save_register();
exynos_set_wakeupmask();
}
@@ -346,6 +359,7 @@ static int exynos_cpu_pm_notifier(struct notifier_block *self,
if (!soc_is_exynos5250())
scu_enable(S5P_VA_SCU);
exynos_cpu_restore_register();
+ exynos_pm_central_resume();
}
break;
}
--
1.7.9.5
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