Re: [PATCH 0/6] mmc: sdhci-s3c: Fix base clock source management

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Am Samstag, 11. Januar 2014, 22:39:00 schrieb Tomasz Figa:
> Tested on S3C6410-based Mini6410 board, with following performance
> figures:
> 
> * Before this series (133 MHz HCLK always selected, leading to at most
>   33 MHz card clock):
>
> root@tiny6410:~# hdparm -t /dev/mmcblk0
> 
> /dev/mmcblk0:
>  Timing buffered disk reads:  42 MB in  3.10 seconds =  13.54 MB/sec

# hdparm -t /dev/mmcblk0

/dev/mmcblk0:
 Timing buffered disk reads: 44 MB in  3.12 seconds =  14.11 MB/sec


> * After this series (48 MHz EPLL clock selected, leading to 48 MHz card
>   clock):
>
> root@tiny6410:~# hdparm -t /dev/mmcblk0
> 
> /dev/mmcblk0:
>  Timing buffered disk reads:  56 MB in  3.04 seconds =  18.41 MB/sec

# hdparm -t /dev/mmcblk0

/dev/mmcblk0:
 Timing buffered disk reads: 48 MB in  3.01 seconds =  15.94 MB/sec


So on a s3c2416:
Tested-by: Heiko Stuebner <heiko@xxxxxxxxx>
Acked-by: Heiko Stuebner <heiko@xxxxxxxxx>


Thanks for the added bandwidth :-)
Heiko

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