On 12/12/13 20:36, Leela Krishna Amudala wrote:
Hi Kukjin,
Even though you said it is applied, I didn't see this patch in any of
your trees.
Can you kindly look into this patch and take necessary action..?
Applied, thanks.
Kukjin
Best Wishes,
Leela Krishna.
On Tue, Nov 12, 2013 at 8:13 PM, Kukjin Kim<kgene@xxxxxxxxxx> wrote:
Leela Krishna Amudala wrote:
+ dt ml.
From: Padmavathi Venna<padma.v@xxxxxxxxxxx>
This patch adds dma controller node info on Exynos5420.
Exynos5420 has adma for audio IPs. As adma clk is dependent
on audss clk provider that will be added later.
Signed-off-by: Padmavathi Venna<padma.v@xxxxxxxxxxx>
Signed-off-by: Leela Krishna Amudala<l.krishna@xxxxxxxxxxx>
---
Change since V2:
- Removed adma node as adma clock is dependent audss clock provider.
Changes since V1:
- In V1, dma node common stuff was added in common exynos5.dtsi
file.
This was removed as per Kukjin comment and added in
exynos5420.dtsi.
arch/arm/boot/dts/exynos5420.dtsi | 52
+++++++++++++++++++++++++++++++++++++
1 file changed, 52 insertions(+)
diff --git a/arch/arm/boot/dts/exynos5420.dtsi
b/arch/arm/boot/dts/exynos5420.dtsi
index d537cd7..15465f8 100644
--- a/arch/arm/boot/dts/exynos5420.dtsi
+++ b/arch/arm/boot/dts/exynos5420.dtsi
@@ -186,6 +186,58 @@
status = "okay";
};
+ amba {
+ #address-cells =<1>;
+ #size-cells =<1>;
+ compatible = "arm,amba-bus";
+ interrupt-parent =<&gic>;
+ ranges;
+
+ pdma0: pdma@121A0000 {
+ compatible = "arm,pl330", "arm,primecell";
+ reg =<0x121A0000 0x1000>;
+ interrupts =<0 34 0>;
+ clocks =<&clock 362>;
+ clock-names = "apb_pclk";
+ #dma-cells =<1>;
+ #dma-channels =<8>;
+ #dma-requests =<32>;
+ };
+
+ pdma1: pdma@121B0000 {
+ compatible = "arm,pl330", "arm,primecell";
+ reg =<0x121B0000 0x1000>;
+ interrupts =<0 35 0>;
+ clocks =<&clock 363>;
+ clock-names = "apb_pclk";
+ #dma-cells =<1>;
+ #dma-channels =<8>;
+ #dma-requests =<32>;
+ };
+
+ mdma0: mdma@10800000 {
+ compatible = "arm,pl330", "arm,primecell";
+ reg =<0x10800000 0x1000>;
+ interrupts =<0 33 0>;
+ clocks =<&clock 473>;
+ clock-names = "apb_pclk";
+ #dma-cells =<1>;
+ #dma-channels =<8>;
+ #dma-requests =<1>;
+ };
+
+ mdma1: mdma@11C10000 {
+ compatible = "arm,pl330", "arm,primecell";
+ reg =<0x11C10000 0x1000>;
+ interrupts =<0 124 0>;
+ clocks =<&clock 442>;
+ clock-names = "apb_pclk";
+ #dma-cells =<1>;
+ #dma-channels =<8>;
+ #dma-requests =<1>;
+ };
+ };
+
serial@12C00000 {
clocks =<&clock 257>,<&clock 128>;
clock-names = "uart", "clk_uart_baud0";
--
1.7.10.4
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