Hi Lukasz,
On 25 September 2013 16:52, Lukasz Majewski <l.majewski@xxxxxxxxxxx> wrote:
>
> static void exynos4x12_set_apll(unsigned int index)
> {
> - unsigned int tmp, pdiv;
> + unsigned int tmp, freq = apll_freq_4x12[index].freq;
nit: It is better to put the 'freq' assignment on a new line.
>
> - /* 1. MUX_CORE_SEL = MPLL, ARMCLK uses MPLL for lock time */
> + /* MUX_CORE_SEL = MPLL, ARMCLK uses MPLL for lock time */
> clk_set_parent(moutcore, mout_mpll);
>
> do {
> @@ -140,24 +140,9 @@ static void exynos4x12_set_apll(unsigned int index)
> tmp &= 0x7;
> } while (tmp != 0x2);
>
> - /* 2. Set APLL Lock time */
> - pdiv = ((apll_freq_4x12[index].mps >> 8) & 0x3f);
> + clk_set_rate(mout_apll, freq * 1000);
Don't we need to check the return value of this?
Same comments for the second patch too.
--
With warm regards,
Sachin
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