Rahul Sharma wrote:
>
> I2C nodes shares many properties across exynos5 SoCs (exynos5250
> and exyno5420). Common code is moved to exynos5.dtsi which is
> included in exyno5250 and exynos5420 SoC files.
>
> Signed-off-by: Rahul Sharma <rahul.sharma@xxxxxxxxxxx>
> ---
> arch/arm/boot/dts/exynos5.dtsi | 36
> +++++++++++++++++++++++++++++
> arch/arm/boot/dts/exynos5250-arndale.dts | 1 +
> arch/arm/boot/dts/exynos5250-smdk5250.dts | 3 +++
> arch/arm/boot/dts/exynos5250.dtsi | 20 ----------------
> 4 files changed, 40 insertions(+), 20 deletions(-)
>
> diff --git a/arch/arm/boot/dts/exynos5.dtsi
> b/arch/arm/boot/dts/exynos5.dtsi
> index f65e124..1ae179e 100644
> --- a/arch/arm/boot/dts/exynos5.dtsi
> +++ b/arch/arm/boot/dts/exynos5.dtsi
> @@ -108,4 +108,40 @@
> interrupts = <0 42 0>;
> status = "disabled";
> };
> +
> + i2c_0: i2c@12C60000 {
> + compatible = "samsung,s3c2440-i2c";
> + reg = <0x12C60000 0x100>;
> + interrupts = <0 56 0>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + status = "disabled";
> + };
> +
> + i2c_1: i2c@12C70000 {
> + compatible = "samsung,s3c2440-i2c";
> + reg = <0x12C70000 0x100>;
> + interrupts = <0 57 0>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + status = "disabled";
> + };
> +
> + i2c_2: i2c@12C80000 {
> + compatible = "samsung,s3c2440-i2c";
> + reg = <0x12C80000 0x100>;
> + interrupts = <0 58 0>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + status = "disabled";
> + };
> +
> + i2c_3: i2c@12C90000 {
> + compatible = "samsung,s3c2440-i2c";
> + reg = <0x12C90000 0x100>;
> + interrupts = <0 59 0>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + status = "disabled";
> + };
> };
> diff --git a/arch/arm/boot/dts/exynos5250-arndale.dts
> b/arch/arm/boot/dts/exynos5250-arndale.dts
> index 96d528d..83ab780 100644
> --- a/arch/arm/boot/dts/exynos5250-arndale.dts
> +++ b/arch/arm/boot/dts/exynos5250-arndale.dts
> @@ -31,6 +31,7 @@
> };
>
> i2c@12C60000 {
> + status = "okay";
> samsung,i2c-sda-delay = <100>;
> samsung,i2c-max-bus-freq = <20000>;
> samsung,i2c-slave-addr = <0x66>;
> diff --git a/arch/arm/boot/dts/exynos5250-smdk5250.dts
> b/arch/arm/boot/dts/exynos5250-smdk5250.dts
> index 49f18c2..945e6cc 100644
> --- a/arch/arm/boot/dts/exynos5250-smdk5250.dts
> +++ b/arch/arm/boot/dts/exynos5250-smdk5250.dts
> @@ -28,6 +28,7 @@
> };
>
> i2c@12C60000 {
> + status = "okay";
> samsung,i2c-sda-delay = <100>;
> samsung,i2c-max-bus-freq = <20000>;
>
> @@ -62,6 +63,7 @@
> };
>
> i2c@12C70000 {
> + status = "okay";
> samsung,i2c-sda-delay = <100>;
> samsung,i2c-max-bus-freq = <20000>;
>
> @@ -101,6 +103,7 @@
> };
>
> i2c@12C80000 {
> + status = "okay";
> samsung,i2c-sda-delay = <100>;
> samsung,i2c-max-bus-freq = <66000>;
>
> diff --git a/arch/arm/boot/dts/exynos5250.dtsi
> b/arch/arm/boot/dts/exynos5250.dtsi
> index 93d6cc5..de54b38 100644
> --- a/arch/arm/boot/dts/exynos5250.dtsi
> +++ b/arch/arm/boot/dts/exynos5250.dtsi
> @@ -217,11 +217,6 @@
> };
>
> i2c_0: i2c@12C60000 {
> - compatible = "samsung,s3c2440-i2c";
> - reg = <0x12C60000 0x100>;
> - interrupts = <0 56 0>;
> - #address-cells = <1>;
> - #size-cells = <0>;
> clocks = <&clock 294>;
> clock-names = "i2c";
> pinctrl-names = "default";
> @@ -229,11 +224,6 @@
> };
>
> i2c_1: i2c@12C70000 {
> - compatible = "samsung,s3c2440-i2c";
> - reg = <0x12C70000 0x100>;
> - interrupts = <0 57 0>;
> - #address-cells = <1>;
> - #size-cells = <0>;
> clocks = <&clock 295>;
> clock-names = "i2c";
> pinctrl-names = "default";
> @@ -241,11 +231,6 @@
> };
>
> i2c_2: i2c@12C80000 {
> - compatible = "samsung,s3c2440-i2c";
> - reg = <0x12C80000 0x100>;
> - interrupts = <0 58 0>;
> - #address-cells = <1>;
> - #size-cells = <0>;
> clocks = <&clock 296>;
> clock-names = "i2c";
> pinctrl-names = "default";
> @@ -253,11 +238,6 @@
> };
>
> i2c_3: i2c@12C90000 {
> - compatible = "samsung,s3c2440-i2c";
> - reg = <0x12C90000 0x100>;
> - interrupts = <0 59 0>;
> - #address-cells = <1>;
> - #size-cells = <0>;
> clocks = <&clock 297>;
> clock-names = "i2c";
> pinctrl-names = "default";
> --
> 1.7.10.4
NAK, there are 8 I2C channels with different address on upcoming exynos5 so
this change is not acceptable. Note please check at least upcoming SoC
before making common something if possible.
- Kukjin
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