Yadwinder, On Wed, Jun 12, 2013 at 1:33 PM, Doug Anderson <dianders@xxxxxxxxxxxx> wrote: > So. We just found that this type of solution doesn't work on > exynos5420, since the LOCK and CON registers aren't always 0x100 away > from each other. Perhaps you can adjust to use a solution like Andrew > proposed in <https://gerrit.chromium.org/gerrit/#/c/58411/>? That way > we can avoid some churn of changing this code twice. > > The number of parameters to the register PLL function is starting to > get unwieldy. At some point we'll probably want to pass in a > structure. I wonder if now would be the time? Certainly it would be > easier to handle changes to the code without touching all of the > exynos variants... It's also probably wise to preemptively rebase atop <https://patchwork.kernel.org/patch/2704761/> since that looks like it will land in 3.10 and your series is destined for the release after. -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
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