From: Subash Patel <subash.rp@xxxxxxxxxxx>
PMU in exynos5440 generates one interrupt per core and needs to
be passed from DT to GIC to register it.
Signed-off-by: Subash Patel <subash.rp@xxxxxxxxxxx>
Signed-off-by: Kukjin Kim <kgene.kim@xxxxxxxxxxx>
---
arch/arm/boot/dts/exynos5440.dtsi | 8 ++++++++
1 files changed, 8 insertions(+), 0 deletions(-)
diff --git a/arch/arm/boot/dts/exynos5440.dtsi b/arch/arm/boot/dts/exynos5440.dtsi
index 715ea15..5a339f0 100644
--- a/arch/arm/boot/dts/exynos5440.dtsi
+++ b/arch/arm/boot/dts/exynos5440.dtsi
@@ -55,6 +55,14 @@
};
};
+ arm-pmu {
+ compatible = "arm,cortex-a15-pmu", "arm,cortex-a9-pmu";
+ interrupts = <0 52 4>,
+ <0 53 4>,
+ <0 54 4>,
+ <0 55 4>;
+ };
+
timer {
compatible = "arm,cortex-a15-timer",
"arm,armv7-timer";
--
1.7.4.4
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