Hi Sylwester, >> >> /* Interrupt mask */ >> #define S5PCSIS_INTMSK 0x10 >> -#define S5PCSIS_INTMSK_EN_ALL 0xf000103f >> +#define S5PCSIS_INTMSK_EN_ALL 0xfc00103f > > Do you know what interrupts are assigned to the CSIS_INTMSK > bits 26, 27 ? In the documentation I have they are marked > as reserved. I have tested this patch on Exynos4x12, it seems > OK but you might want to merge it to the patch adding compatible > property for exynos5. The bits 26 and 27 are for Frame start and Frame end interrupts. Yes this change can be merged with the MIPI-CSIS support for Exynos5. Shaik will pick it up and merge it along with his patch series in v2. > > It would be good to know what these bits are for. And how > enabling the interrupts actually help without modifying the > interrupt handler ? Is it enough to just acknowledge those > interrupts ? Or how it works ? > These interrupts are used by the FIMC-IS firmware possibly to check if the sensor is working. Without enabling these, I get the error from firmware on Sensor Open command. Regards Arun -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
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