Hi Felipe,
On Mon, Jan 28, 2013 at 6:37 PM, Felipe Balbi <balbi@xxxxxx> wrote:
> Hi,
>
> On Mon, Jan 28, 2013 at 06:34:15PM +0530, Vivek Gautam wrote:
>> >> @@ -65,7 +67,22 @@ static u32 samsung_usb3_phy_set_refclk(struct samsung_usbphy *sphy)
>> >> return reg;
>> >> }
>> >>
>> >> -static int samsung_exynos5_usb3_phy_enable(struct samsung_usbphy *sphy)
>> >> +/*
>> >> + * Sets the phy clk as ref_pad_clk (XusbXTI) which is clock from external PLL.
>> >> + */
>> >> +static u32 samsung_usb3_phy_set_refclk_ext(void)
>> >> +{
>> >> + u32 reg;
>> >> +
>> >> + reg = PHYCLKRST_REFCLKSEL_PAD_REFCLK |
>> >> + PHYCLKRST_FSEL_PAD_100MHZ |
>> >> + PHYCLKRST_MPLL_MULTIPLIER_100MHZ_REF;
>> >> +
>> >> + return reg;
>> >> +}
>> >
>> > I wonder if you really need this small function (likewise for
>> > set_refclk_int()). They don't do much, so you could just inline them on
>> > the only caller.
>> >
>>
>> Created this just to keep symmetry, ;-)
>> will move this in the caller only.
>
> you can have a patch before this series moving the refclk_int() to the
> caller, then you will have symmetry ;-)
>
refclk_int() was rather slightly a big chunk :-(
as available in below patch as samsung_usb3_phy_set_refclk() :
[PATCH v4 2/2] usb: phy: samsung: Add PHY support for USB 3.0 controller
http://www.mail-archive.com/linux-usb@xxxxxxxxxxxxxxx/msg13796.html
Will try to figure best possible way and amend.
--
Thanks & Regards
Vivek
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