Add clock controller nodes for Exynos4210 and Exynos4x12 SoC's.
Cc: Kukjin Kim <kgene.kim@xxxxxxxxxxx>
Signed-off-by: Thomas Abraham <thomas.abraham@xxxxxxxxxx>
---
arch/arm/boot/dts/exynos4210.dtsi | 6 ++++++
arch/arm/boot/dts/exynos4x12.dtsi | 6 ++++++
2 files changed, 12 insertions(+), 0 deletions(-)
diff --git a/arch/arm/boot/dts/exynos4210.dtsi b/arch/arm/boot/dts/exynos4210.dtsi
index 1542d86..a47d7fc 100644
--- a/arch/arm/boot/dts/exynos4210.dtsi
+++ b/arch/arm/boot/dts/exynos4210.dtsi
@@ -55,6 +55,12 @@
samsung,mct-nr-local-irqs = <4>;
};
+ clock: clock-controller@0x10030000 {
+ compatible = "samsung,exynos4210-clock";
+ reg = <0x10030000 0x20000>;
+ #clock-cells = <1>;
+ };
+
pmu {
compatible = "arm,cortex-a9-pmu";
interrupt-parent = <&combiner>;
diff --git a/arch/arm/boot/dts/exynos4x12.dtsi b/arch/arm/boot/dts/exynos4x12.dtsi
index 0c6d001..00138d3 100644
--- a/arch/arm/boot/dts/exynos4x12.dtsi
+++ b/arch/arm/boot/dts/exynos4x12.dtsi
@@ -36,6 +36,12 @@
<0 16 0>, <0 17 0>, <0 18 0>, <0 19 0>;
};
+ clock: clock-controller@0x10030000 {
+ compatible = "samsung,exynos4412-clock";
+ reg = <0x10030000 0x20000>;
+ #clock-cells = <1>;
+ };
+
pinctrl_0: pinctrl@11400000 {
compatible = "samsung,pinctrl-exynos4x12";
reg = <0x11400000 0x1000>;
--
1.7.5.4
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