RE: [PATCH 3/3] ARM: EXYNOS: Invert VCLK polarity for framebuffer on Origen board

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Tushar Behera wrote:
> 
> Framebuffer driver needs to fetch the video data during the rising
> edge of the VCLK. Otherwise, there are some glitches in the LCD
> display.
> 
> Signed-off-by: Tushar Behera <tushar.behera@xxxxxxxxxx>
> ---
>  arch/arm/mach-exynos/mach-origen.c |    3 ++-
>  1 files changed, 2 insertions(+), 1 deletions(-)
> 
> diff --git a/arch/arm/mach-exynos/mach-origen.c b/arch/arm/mach-
> exynos/mach-origen.c
> index f56d027..38f0556 100644
> --- a/arch/arm/mach-exynos/mach-origen.c
> +++ b/arch/arm/mach-exynos/mach-origen.c
> @@ -588,7 +588,8 @@ static struct s3c_fb_pd_win origen_fb_win0 = {
>  static struct s3c_fb_platdata origen_lcd_pdata __initdata = {
>  	.win[0]		= &origen_fb_win0,
>  	.vidcon0	= VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
> -	.vidcon1	= VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
> +	.vidcon1	= VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC |
> +				VIDCON1_INV_VCLK,
>  	.setup_gpio	= exynos4_fimd0_gpio_setup_24bpp,
>  };
> 
> --
> 1.7.4.1

OK, will apply this.

And I will review 1/3 and 2/3 patches soon.
Thanks.

Best regards,
Kgene.
--
Kukjin Kim <kgene.kim@xxxxxxxxxxx>, Senior Engineer,
SW Solution Development Team, Samsung Electronics Co., Ltd.

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