Hi,
On Sat, Apr 9, 2011 at 10:58 AM, Sangbeom Kim <sbkim73@xxxxxxxxxxx> wrote:
> This patch add pcm audio configuration for SMDKV210 and SMDKC110.
> Platform device and pcm clock initialization code is added.
>
> Signed-off-by: Sangbeom Kim <sbkim73@xxxxxxxxxxx>
> ---
> Âarch/arm/mach-s5pv210/clock.c          |  90 ++++++++++++++++++++++-
> Âarch/arm/mach-s5pv210/cpu.c           |  Â7 ++-
> Âarch/arm/mach-s5pv210/include/mach/map.h    Â|  Â2 +
> Âarch/arm/mach-s5pv210/include/mach/regs-audss.h | Â 45 +++++++++++
> Âarch/arm/mach-s5pv210/mach-smdkc110.c      |  Â7 ++
> Âarch/arm/mach-s5pv210/mach-smdkv210.c      |  Â7 ++
> Âarch/arm/plat-s5p/include/plat/map-s5p.h    Â|  Â1 +
> Â7 files changed, 155 insertions(+), 4 deletions(-)
> Âcreate mode 100644 arch/arm/mach-s5pv210/include/mach/regs-audss.h
>
> diff --git a/arch/arm/mach-s5pv210/clock.c b/arch/arm/mach-s5pv210/clock.c
> index 2d59949..a964e1c 100644
> --- a/arch/arm/mach-s5pv210/clock.c
> +++ b/arch/arm/mach-s5pv210/clock.c
> @@ -21,6 +21,7 @@
> Â#include <linux/io.h>
>
> Â#include <mach/map.h>
> +#include <mach/regs-audss.h>
>
> Â#include <plat/cpu-freq.h>
> Â#include <mach/regs-clock.h>
> @@ -185,6 +186,11 @@ static int s5pv210_clk_mask1_ctrl(struct clk *clk, int enable)
> Â Â Â Âreturn s5p_gatectrl(S5P_CLK_SRC_MASK1, clk, enable);
> Â}
>
> +static int s5pv210_clk_audss_ctrl(struct clk *clk, int enable)
> +{
> + Â Â Â return s5p_gatectrl(S5P_CLKGATE_AUDSS, clk, enable);
> +}
> +
> Âstatic struct clk clk_sclk_hdmi27m = {
>    Â.name      = "sclk_hdmi27m",
>    Â.id       = -1,
> @@ -208,17 +214,28 @@ static struct clk clk_sclk_usbphy1 = {
>
> Âstatic struct clk clk_pcmcdclk0 = {
>    Â.name      = "pcmcdclk",
> -    .id       = -1,
> +    .id       = 0,
> +    .rate      = 2048000,
I think that this fixed rate setting is not good, because this clock.c
is not only for SMDK board, but for all S5PV210 based machines.
> Â};
>
> Âstatic struct clk clk_pcmcdclk1 = {
>    Â.name      = "pcmcdclk",
> -    .id       = -1,
> +    .id       = 1,
> Â};
>
> Âstatic struct clk clk_pcmcdclk2 = {
>    Â.name      = "pcmcdclk",
> -    .id       = -1,
> +    .id       = 2,
> +};
> +
> +static struct clk clk_i2scdclk0 = {
> +    .name      = "i2scdclk",
> +    .id       = 0,
> +};
> +
> +static struct clk clk_i2scdclk1 = {
> +    .name      = "i2scdclk",
> +    .id       = 1,
> Â};
>
> Âstatic struct clk *clkset_vpllsrc_list[] = {
> @@ -490,6 +507,24 @@ static struct clk init_clocks_off[] = {
>        Â.parent     = &clk_p,
>        Â.enable     = s5pv210_clk_ip3_ctrl,
>        Â.ctrlbit    Â= (1 << 0),
> + Â Â Â }, {
> +        .name      = "pcm",
> +        .id       = 0,
> +        .parent     = &clk_pclk_psys.clk,
> +        .enable     = s5pv210_clk_ip3_ctrl,
> +        .ctrlbit    Â= (1 << 28),
> + Â Â Â }, {
> +        .name      = "pcm",
> +        .id       = 1,
> +        .parent     = &clk_pclk_psys.clk,
> +        .enable     = s5pv210_clk_ip3_ctrl,
> +        .ctrlbit    Â= (1 << 29),
> + Â Â Â }, {
> +        .name      = "pcm",
> +        .id       = 2,
> +        .parent     = &clk_pclk_psys.clk,
> +        .enable     = s5pv210_clk_ip3_ctrl,
> +        .ctrlbit    Â= (1 << 30),
> Â Â Â Â},
> Â};
>
> @@ -714,6 +749,48 @@ static struct clksrc_clk clk_sclk_audio2 = {
> Â Â Â Â.reg_div = { .reg = S5P_CLK_DIV6, .shift = 8, .size = 4 },
> Â};
>
> +static struct clk *clkset_mout_audss_list[] = {
> + Â Â Â NULL,
> + Â Â Â &clk_fout_epll,
> +};
> +
> +static struct clksrc_sources clkset_mout_audss = {
> +    .sources    Â= clkset_mout_audss_list,
> +    .nr_sources   = ARRAY_SIZE(clkset_mout_audss_list),
> +};
> +
> +static struct clksrc_clk clk_mout_audss = {
> +    .clk  Â= {
> +        .name      = "mout_audss",
> +        .id       = -1,
> + Â Â Â },
> +    .sources    Â= &clkset_mout_audss,
> +    .reg_src    Â= { .reg = S5P_CLKSRC_AUDSS, .shift = 0, .size = 1 },
> +};
> +
> +static struct clk *clkset_sclk_audss_list[] = {
> + Â Â Â &clk_mout_audss.clk,
> + Â Â Â &clk_i2scdclk0,
> + Â Â Â &clk_sclk_audio0.clk,
> +};
> +
> +static struct clksrc_sources clkset_sclk_audss = {
> +    .sources    Â= clkset_sclk_audss_list,
> +    .nr_sources   = ARRAY_SIZE(clkset_sclk_audss_list),
> +};
> +
> +static struct clksrc_clk clk_sclk_audss = {
> +    .clk  Â= {
> +        .name      = "audio-bus",
> +        .id       = -1,
> +        .enable     = s5pv210_clk_audss_ctrl,
> +        .ctrlbit    Â= (1 << 6),
> + Â Â Â },
> +    .sources    Â= &clkset_sclk_audss,
> +    .reg_src    Â= { .reg = S5P_CLKSRC_AUDSS, .shift = 2, .size = 2 },
> +    .reg_div    Â= { .reg = S5P_CLKDIV_AUDSS, .shift = 4, .size = 4 },
> +};
> +
These clock sources are not just for pcm clock, these are for audio subsystem.
So I think that should be separated to another patch for add audio
subsystem on s5pv210.
> Âstatic struct clk *clkset_sclk_spdif_list[] = {
> Â Â Â Â[0] = &clk_sclk_audio0.clk,
> Â Â Â Â[1] = &clk_sclk_audio1.clk,
> @@ -1058,6 +1135,8 @@ static struct clksrc_clk *sysclks[] = {
> Â Â Â Â&clk_sclk_hdmi,
> Â Â Â Â&clk_mout_dmc0,
> Â Â Â Â&clk_sclk_dmc0,
> + Â Â Â &clk_mout_audss,
> + Â Â Â &clk_sclk_audss,
ditto
> Â Â Â Â&clk_sclk_audio0,
> Â Â Â Â&clk_sclk_audio1,
> Â Â Â Â&clk_sclk_audio2,
> @@ -1212,6 +1291,9 @@ void __init_or_cpufreq s5pv210_setup_clocks(void)
>
> Â Â Â Âfor (ptr = 0; ptr < ARRAY_SIZE(clksrcs); ptr++)
> Â Â Â Â Â Â Â Âs3c_set_clksrc(&clksrcs[ptr], true);
> +
> + Â Â Â clk_set_parent(&clk_sclk_audio0.clk, &clk_pcmcdclk0);
> + Â Â Â clk_set_parent(&clk_sclk_audss.clk, &clk_sclk_audio0.clk);
ditto
> Â}
>
> Âstatic struct clk *clks[] __initdata = {
> @@ -1219,6 +1301,8 @@ static struct clk *clks[] __initdata = {
> Â Â Â Â&clk_sclk_hdmiphy,
> Â Â Â Â&clk_sclk_usbphy0,
> Â Â Â Â&clk_sclk_usbphy1,
> + Â Â Â &clk_i2scdclk0,
> + Â Â Â &clk_i2scdclk1,
ditto
> Â Â Â Â&clk_pcmcdclk0,
> Â Â Â Â&clk_pcmcdclk1,
> Â Â Â Â&clk_pcmcdclk2,
> diff --git a/arch/arm/mach-s5pv210/cpu.c b/arch/arm/mach-s5pv210/cpu.c
> index 61e6c24..4aa98ad 100644
> --- a/arch/arm/mach-s5pv210/cpu.c
> +++ b/arch/arm/mach-s5pv210/cpu.c
> @@ -95,7 +95,12 @@ static struct map_desc s5pv210_iodesc[] __initdata = {
>        Â.pfn      Â=__phys_to_pfn(S5PV210_PA_HSPHY),
>        Â.length     = SZ_4K,
>        Â.type      = MT_DEVICE,
> - Â Â Â }
> + Â Â Â }, {
> +        .virtual    Â= (unsigned long)S5P_VA_AUDSS,
> +        .pfn      Â= __phys_to_pfn(S5PV210_PA_AUDSS),
> +        .length     = SZ_1K,
> +        .type      = MT_DEVICE,
> + Â Â Â },
ditto
> Â};
>
> Âstatic void s5pv210_idle(void)
> diff --git a/arch/arm/mach-s5pv210/include/mach/map.h b/arch/arm/mach-s5pv210/include/mach/map.h
> index 1dd5883..195874e 100644
> --- a/arch/arm/mach-s5pv210/include/mach/map.h
> +++ b/arch/arm/mach-s5pv210/include/mach/map.h
> @@ -64,6 +64,8 @@
> Â#define S5PV210_PA_HSOTG Â Â Â Â Â Â Â 0xEC000000
> Â#define S5PV210_PA_HSPHY Â Â Â Â Â Â Â 0xEC100000
>
> +#define S5PV210_PA_AUDSS Â Â Â Â Â Â Â 0xEEE10000
> +
ditto
> Â#define S5PV210_PA_IIS0 Â Â Â Â Â Â Â Â Â Â Â Â0xEEE30000
> Â#define S5PV210_PA_IIS1 Â Â Â Â Â Â Â Â Â Â Â Â0xE2100000
> Â#define S5PV210_PA_IIS2 Â Â Â Â Â Â Â Â Â Â Â Â0xE2A00000
> diff --git a/arch/arm/mach-s5pv210/include/mach/regs-audss.h b/arch/arm/mach-s5pv210/include/mach/regs-audss.h
> new file mode 100644
> index 0000000..2fa3c23
> --- /dev/null
> +++ b/arch/arm/mach-s5pv210/include/mach/regs-audss.h
ditto
> @@ -0,0 +1,45 @@
> +/* arch/arm/mach-s5pv210/include/mach/regs-clock.h
> + *
> + * Copyright (c) 2011 Samsung Electronics Co., Ltd.
> + * Â Â Â Â Â Â http://www.samsung.com/
> + *
> + * S5PV210 - Audio SubSystem clock register definitions
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> +*/
> +
> +#ifndef __ASM_ARCH_REGS_AUDSS_H
> +#define __ASM_ARCH_REGS_AUDSS_H __FILE__
> +
> +#define S5P_AUDSSREG(x) Â Â Â Â Â Â Â Â Â Â Â Â(S5P_VA_AUDSS + (x))
> +
> +#define S5P_CLKSRC_AUDSS Â Â Â Â Â Â Â S5P_AUDSSREG(0x0)
> +#define S5P_CLKDIV_AUDSS Â Â Â Â Â Â Â S5P_AUDSSREG(0x4)
> +#define S5P_CLKGATE_AUDSS Â Â Â Â Â Â ÂS5P_AUDSSREG(0x8)
> +
> +/* CLKSRC0 */
> +#define S5P_AUDSS_CLKSRC_MAIN_MASK Â Â (0x1<<0)
> +#define S5P_AUDSS_CLKSRC_MAIN_SHIFT Â Â(0)
> +#define S5P_AUDSS_CLKSRC_BUSCLK_MASK Â (0x1<<1)
> +#define S5P_AUDSS_CLKSRC_BUSCLK_SHIFT Â(1)
> +#define S5P_AUDSS_CLKSRC_I2SCLK_MASK Â (0x3<<2)
> +#define S5P_AUDSS_CLKSRC_I2SCLK_SHIFT Â(2)
> +
> +/* CLKDIV0 */
> +#define S5P_AUDSS_CLKDIV_BUSCLK_MASK Â (0xf<<0)
> +#define S5P_AUDSS_CLKDIV_BUSCLK_SHIFT Â(0)
> +#define S5P_AUDSS_CLKDIV_I2SCLK_MASK Â (0xf<<4)
> +#define S5P_AUDSS_CLKDIV_I2SCLK_SHIFT Â(4)
> +
> +/* IP Clock Gate 0 Registers */
> +#define S5P_AUDSS_CLKGATE_HCLKRP Â Â Â (1<<0)
> +#define S5P_AUDSS_CLKGATE_HCLKBUF Â Â Â(1<<1)
> +#define S5P_AUDSS_CLKGATE_HCLKDMA Â Â Â(1<<2)
> +#define S5P_AUDSS_CLKGATE_HCLKHWA Â Â Â(1<<3)
> +#define S5P_AUDSS_CLKGATE_HCLKUART Â Â (1<<4)
> +#define S5P_AUDSS_CLKGATE_HCLKI2S Â Â Â(1<<5)
> +#define S5P_AUDSS_CLKGATE_CLKI2S Â Â Â (1<<6)
> +
> +#endif /* __ASM_ARCH_REGS_AUDSS_H */
...(snip)...
> diff --git a/arch/arm/plat-s5p/include/plat/map-s5p.h b/arch/arm/plat-s5p/include/plat/map-s5p.h
> index d973d39..daa4a44 100644
> --- a/arch/arm/plat-s5p/include/plat/map-s5p.h
> +++ b/arch/arm/plat-s5p/include/plat/map-s5p.h
> @@ -40,6 +40,7 @@
> Â#define S5P_VA_GIC_DIST Â Â Â Â Â Â Â ÂS5P_VA_COREPERI(0x1000)
>
> Â#define S3C_VA_USB_HSPHY Â Â Â S3C_ADDR(0x02900000)
> +#define S5P_VA_AUDSS Â Â Â Â Â S3C_ADDR(0x02A00000)
ditto
claude
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