MyungJoo Ham wrote:
>
> On Wed, Aug 18, 2010 at 11:01 PM, Kukjin Kim <kgene.kim@xxxxxxxxxxx>
wrote:
> > From: Jongpill Lee <boyko.lee@xxxxxxxxxxx>
> >
> > This patch adds clocks for S5PV310/S5PC210.
> >
> > Signed-off-by: Jongpill Lee <boyko.lee@xxxxxxxxxxx>
> > Signed-off-by: Kukjin Kim <kgene.kim@xxxxxxxxxxx>
> > ---
> > arch/arm/mach-s5pv310/clock.c | 155
> ++++++++++++++++++++++++++++++++++++++++-
> > 1 files changed, 154 insertions(+), 1 deletions(-)
> >
> > diff --git a/arch/arm/mach-s5pv310/clock.c
b/arch/arm/mach-s5pv310/clock.c
> > index ec69edc..14c9707 100644
> > --- a/arch/arm/mach-s5pv310/clock.c
> > +++ b/arch/arm/mach-s5pv310/clock.c
> > @@ -61,6 +61,26 @@ static int s5pv310_clksrc_mask_peril0_ctrl(struct clk
*clk,
> int enable)
> > return s5p_gatectrl(S5P_CLKSRC_MASK_PERIL0, clk, enable);
> > }
> >
> > +static int s5pv310_clk_ip_cam_ctrl(struct clk *clk, int enable)
> > +{
> > + return s5p_gatectrl(S5P_CLKGATE_IP_CAM, clk, enable);
> > +}
> > +
> > +static int s5pv310_clk_ip_image_ctrl(struct clk *clk, int enable)
> > +{
> > + return s5p_gatectrl(S5P_CLKGATE_IP_IMAGE, clk, enable);
> > +}
> > +
> > +static int s5pv310_clk_ip_lcd0_ctrl(struct clk *clk, int enable)
> > +{
> > + return s5p_gatectrl(S5P_CLKGATE_IP_LCD0, clk, enable);
> > +}
> > +
> > +static int s5pv310_clk_ip_lcd1_ctrl(struct clk *clk, int enable)
> > +{
> > + return s5p_gatectrl(S5P_CLKGATE_IP_LCD1, clk, enable);
> > +}
> > +
> > static int s5pv310_clk_ip_fsys_ctrl(struct clk *clk, int enable)
> > {
> > return s5p_gatectrl(S5P_CLKGATE_IP_FSYS, clk, enable);
> > @@ -275,6 +295,46 @@ static struct clk init_clocks_disable[] = {
> > .enable = s5pv310_clk_ip_peril_ctrl,
> > .ctrlbit = (1<<24),
> > }, {
> > + .name = "csis",
> > + .id = 0,
> > + .enable = s5pv310_clk_ip_cam_ctrl,
> > + .ctrlbit = (1 << 4),
> > + }, {
> > + .name = "csis",
> > + .id = 1,
> > + .enable = s5pv310_clk_ip_cam_ctrl,
> > + .ctrlbit = (1 << 5),
> > + }, {
> > + .name = "fimc",
> > + .id = 0,
> > + .enable = s5pv310_clk_ip_cam_ctrl,
> > + .ctrlbit = (1 << 0),
> > + }, {
> > + .name = "fimc",
> > + .id = 1,
> > + .enable = s5pv310_clk_ip_cam_ctrl,
> > + .ctrlbit = (1 << 1),
> > + }, {
> > + .name = "fimc",
> > + .id = 2,
> > + .enable = s5pv310_clk_ip_cam_ctrl,
> > + .ctrlbit = (1 << 2),
> > + }, {
> > + .name = "fimc",
> > + .id = 3,
> > + .enable = s5pv310_clk_ip_cam_ctrl,
> > + .ctrlbit = (1 << 3),
> > + }, {
> > + .name = "fimd",
> > + .id = 0,
> > + .enable = s5pv310_clk_ip_lcd0_ctrl,
> > + .ctrlbit = (1 << 0),
> > + }, {
> > + .name = "fimd",
> > + .id = 1,
> > + .enable = s5pv310_clk_ip_lcd1_ctrl,
> > + .ctrlbit = (1 << 0),
> > + }, {
> > .name = "hsmmc",
> > .id = 0,
> > .parent = &clk_aclk_133.clk,
> > @@ -304,7 +364,100 @@ static struct clk init_clocks_disable[] = {
> > .parent = &clk_aclk_133.clk,
> > .enable = s5pv310_clk_ip_fsys_ctrl,
> > .ctrlbit = (1 << 9),
> > - }
> > + }, {
> > + .name = "sata",
> > + .id = -1,
> > + .enable = s5pv310_clk_ip_fsys_ctrl,
> > + .ctrlbit = (1 << 10),
> > + }, {
> > + .name = "adc",
> > + .id = -1,
> > + .enable = s5pv310_clk_ip_peril_ctrl,
> > + .ctrlbit = (1 << 15),
> > + }, {
> > + .name = "watchdog",
> > + .id = -1,
> > + .enable = s5pv310_clk_ip_peril_ctrl,
>
> s5pv310_clk_ip_perir_ctrl (R, not L) appears to be correct for this entry.
>
> Probably, we may need to sort these according to .enable entry (and
> then .ctrlbit entry) later.
>
You're right. will fix it.
(snip)
Thanks.
Best regards,
Kgene.
--
Kukjin Kim <kgene.kim@xxxxxxxxxxx>, Senior Engineer,
SW Solution Development Team, Samsung Electronics Co., Ltd.
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