Hello.
Ben Dooks wrote:
Add s3c_gpio_cfgpin_range() to configure a range of pins to the given
value. This is useful for a number of blocks where the pins are in order
and saves multiple calls to s3c_gpio_cfgpin().
Signed-off-by: Ben Dooks <ben-linux@xxxxxxxxx>
A little kerneldoc correction:
[...]
diff --git a/arch/arm/plat-samsung/include/plat/gpio-cfg.h b/arch/arm/plat-samsung/include/plat/gpio-cfg.h
index 34efdd2..8ec9936 100644
--- a/arch/arm/plat-samsung/include/plat/gpio-cfg.h
+++ b/arch/arm/plat-samsung/include/plat/gpio-cfg.h
@@ -89,6 +89,19 @@ extern int s3c_gpio_cfgpin(unsigned int pin, unsigned int to);
*/
extern unsigned s3c_gpio_getcfg(unsigned int pin);
+/**
+ * s3c_gpio_cfgpin_range() - Change the GPIO function for configuring pin range
+ * @start: The pin number to start at
+ * @number: The number of pins to configure from @start.
You call the parameter 'nr'.
+ * @cfg: The configuration for the pin's function
+ *
+ * Call s3c_gpio_cfgpin() for the @number pins starting at @start.
+ *
+ * @sa s3c_gpio_cfgpin.
+ */
+extern int s3c_gpio_cfgpin_range(unsigned int start, unsigned int nr,
+ unsigned int cfg);
+
/* Define values for the pull-{up,down} available for each gpio pin.
*
* These values control the state of the weak pull-{up,down} resistors
WBR, Sergei
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