[PATCH] S3C64xx: Fix S3C6400_EPLL_ MDIV_MASK, PDIV_MASK, and SDIV_MASK value

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Fix the values of S3C6400_EPLL_MDIV_MASK, S3C6400_EPLL_PDIV_MASK, and
S3C6400_EPLL_SDIV_MASK.

Signed-off-by: Kukjin Kim <kgene.kim@xxxxxxxxxxx>
---
 arch/arm/plat-s3c64xx/include/plat/pll.h |    6 +++---
 1 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/arch/arm/plat-s3c64xx/include/plat/pll.h b/arch/arm/plat-s3c64xx/include/plat/pll.h
index 90bbd72..3a59d3b 100644
--- a/arch/arm/plat-s3c64xx/include/plat/pll.h
+++ b/arch/arm/plat-s3c64xx/include/plat/pll.h
@@ -37,9 +37,9 @@ static inline unsigned long s3c6400_get_pll(unsigned long baseclk,
 	return (unsigned long)fvco;
 }
 
-#define S3C6400_EPLL_MDIV_MASK	((1 << (23-16)) - 1)
-#define S3C6400_EPLL_PDIV_MASK	((1 << (13-8)) - 1)
-#define S3C6400_EPLL_SDIV_MASK	((1 << (2-0)) - 1)
+#define S3C6400_EPLL_MDIV_MASK	((1 << (23-16+1)) - 1)
+#define S3C6400_EPLL_PDIV_MASK	((1 << (13-8+1)) - 1)
+#define S3C6400_EPLL_SDIV_MASK	((1 << (2-0+1)) - 1)
 #define S3C6400_EPLL_MDIV_SHIFT	(16)
 #define S3C6400_EPLL_PDIV_SHIFT	(8)
 #define S3C6400_EPLL_SDIV_SHIFT	(0)
-- 
1.5.3.4

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