From: Dragos Tatulea <dtatulea@xxxxxxxxxx>
Date: Tue, 10 Dec 2024 12:44:04 +0100
>
>
> On 06.12.24 16:20, Alexandra Winter wrote:
>>
>>
>> On 04.12.24 15:32, Alexander Lobakin wrote:
>>>> @@ -269,6 +270,10 @@ static void mlx5e_sq_xmit_prepare(struct mlx5e_txqsq *sq, struct sk_buff *skb,
>>>> {
>>>> struct mlx5e_sq_stats *stats = sq->stats;
>>>>
>>>> + /* Don't require 2 IOMMU TLB entries, if one is sufficient */
>>>> + if (use_dma_iommu(sq->pdev) && skb->truesize <= PAGE_SIZE)
>> + skb_linearize(skb);
>>> 1. What's with the direct DMA? I believe it would benefit, too?
>>
>>
>> Removing the use_dma_iommu check is fine with us (s390). It is just a proposal to reduce the impact.
>> Any opinions from the NVidia people?
>>
> Agreed.
>
>>
>>> 2. Why truesize, not something like
>>>
>>> if (skb->len <= some_sane_value_maybe_1k)
>>
>>
>> With (skb->truesize <= PAGE_SIZE) the whole "head" buffer fits into 1 page.
>> When we set the threshhold at a smaller value, skb->len makes more sense
>>
>>
>>>
>>> 3. As Eric mentioned, PAGE_SIZE can be up to 256 Kb, I don't think
>>> it's a good idea to rely on this.
>>> Some test-based hardcode would be enough (i.e. threshold on which
>>> DMA mapping starts performing better).
>>
>>
>> A threshhold of 4k is absolutely fine with us (s390).
>> A threshhold of 1k would definitvely improve our situation and bring back the performance for some important scenarios.
>>
>>
>> NVidia people do you have any opinion on a good threshhold?
>>
> 1KB is still to large. As Tariq mentioned, the threshold should not
> exceed 128/256B. I am currently testing this with 256B on x86. So far no
> regressions but I need to play with it more.
On different setups, usually the copybreak of 192 or 256 bytes was the
most efficient as well.
>
> Thanks,
> Dragos
Thanks,
Olek
