On Fri, 21 Apr 2023 11:36:45 +0000
Janosch Frank <frankja@xxxxxxxxxxxxx> wrote:
[...]
> +static void run_loop(void)
> +{
> + sie(&vm);
> + sigp_retry(stap(), SIGP_STOP, 0, NULL);
> +}
> +
> +static void test_validity_already_running(void)
> +{
> + extern const char SNIPPET_NAME_START(asm, loop)[];
> + extern const char SNIPPET_NAME_END(asm, loop)[];
> + extern const char SNIPPET_HDR_START(asm, loop)[];
> + extern const char SNIPPET_HDR_END(asm, loop)[];
> + int size_hdr = SNIPPET_HDR_LEN(asm, loop);
> + int size_gbin = SNIPPET_LEN(asm, loop);
> + struct psw psw = {
> + .mask = PSW_MASK_64,
> + .addr = (uint64_t)run_loop,
> + };
> +
> + report_prefix_push("already running");
> + if (smp_query_num_cpus() < 3) {
> + report_skip("need at least 3 cpus for this test");
> + goto out;
> + }
> +
> + snippet_pv_init(&vm, SNIPPET_NAME_START(asm, loop),
> + SNIPPET_HDR_START(asm, loop),
> + size_gbin, size_hdr, SNIPPET_UNPACK_OFF);
> +
> + sie_expect_validity(&vm);
> + smp_cpu_setup(1, psw);
I would expect the validity here instead (one CPU should run fine)
> + smp_cpu_setup(2, psw);
> + while (vm.sblk->icptcode != ICPT_VALIDITY) {
> + mb();
> + }
> +
> + /*
> + * One cpu will enter SIE and one will receive the validity.
> + * We rely on the expectation that the cpu in SIE won't exit
> + * until we had a chance to observe the validity as the exit
> + * would overwrite the validity.
> + *
> + * In general that expectation is valid but HW/FW can in
> + * theory still exit to handle their interrupts.
> + */
> + report(uv_validity_check(&vm), "validity");
> + smp_cpu_stop(1);
> + smp_cpu_stop(2);
> + uv_destroy_guest(&vm);
> +
> +out:
> + report_prefix_pop();
> +}
> +
> +/* Tests if a vcpu handle from another configuration results in a validity intercept. */
> +static void test_validity_handle_not_in_config(void)
> +{
> + extern const char SNIPPET_NAME_START(asm, icpt_loop)[];
> + extern const char SNIPPET_NAME_END(asm, icpt_loop)[];
> + extern const char SNIPPET_HDR_START(asm, icpt_loop)[];
> + extern const char SNIPPET_HDR_END(asm, icpt_loop)[];
> + int size_hdr = SNIPPET_HDR_LEN(asm, icpt_loop);
> + int size_gbin = SNIPPET_LEN(asm, icpt_loop);
> +
> + report_prefix_push("handle not in config");
> + /* Setup our primary vm */
> + snippet_pv_init(&vm, SNIPPET_NAME_START(asm, icpt_loop),
> + SNIPPET_HDR_START(asm, icpt_loop),
> + size_gbin, size_hdr, SNIPPET_UNPACK_OFF);
> +
> + /* Setup secondary vm */
> + snippet_setup_guest(&vm2, true);
> + snippet_pv_init(&vm2, SNIPPET_NAME_START(asm, icpt_loop),
> + SNIPPET_HDR_START(asm, icpt_loop),
> + size_gbin, size_hdr, SNIPPET_UNPACK_OFF);
> +
> + vm.sblk->pv_handle_cpu = vm2.sblk->pv_handle_cpu;
> + sie_expect_validity(&vm);
> + sie(&vm);
> + report(uv_validity_check(&vm), "validity");
you tested the case where you have the right sie control block but with
the wrong cpu handle, could you also do the other way around? (put the
config handle of the wrong VM)
> +
> + /* Restore cpu handle and destroy the second vm */
> + vm.sblk->pv_handle_cpu = vm.uv.vcpu_handle;
> + uv_destroy_guest(&vm2);
> + sie_guest_destroy(&vm2);
> +
> + uv_destroy_guest(&vm);
> + report_prefix_pop();
> +}
> +
> +/* Tests if a wrong vm or vcpu handle results in a validity intercept. */
> +static void test_validity_seid(void)
> +{
> + extern const char SNIPPET_NAME_START(asm, icpt_loop)[];
> + extern const char SNIPPET_NAME_END(asm, icpt_loop)[];
> + extern const char SNIPPET_HDR_START(asm, icpt_loop)[];
> + extern const char SNIPPET_HDR_END(asm, icpt_loop)[];
> + int size_hdr = SNIPPET_HDR_LEN(asm, icpt_loop);
> + int size_gbin = SNIPPET_LEN(asm, icpt_loop);
> + int fails = 0;
> + int i;
> +
> + report_prefix_push("handles");
> + snippet_pv_init(&vm, SNIPPET_NAME_START(asm, icpt_loop),
> + SNIPPET_HDR_START(asm, icpt_loop),
> + size_gbin, size_hdr, SNIPPET_UNPACK_OFF);
> +
> + for (i = 0; i < 64; i++) {
> + vm.sblk->pv_handle_config ^= 1UL << i;
> + sie_expect_validity(&vm);
> + sie(&vm);
> + if (!uv_validity_check(&vm)) {
> + report_fail("SIE accepted wrong VM SEID, changed bit %d",
> + 63 - i);
> + fails++;
> + }
> + vm.sblk->pv_handle_config ^= 1UL << i;
> + }
> + report(!fails, "No wrong vm handle accepted");
> +
> + fails = 0;
> + for (i = 0; i < 64; i++) {
> + vm.sblk->pv_handle_cpu ^= 1UL << i;
> + sie_expect_validity(&vm);
> + sie(&vm);
> + if (!uv_validity_check(&vm)) {
> + report_fail("SIE accepted wrong CPU SEID, changed bit %d",
> + 63 - i);
> + fails++;
> + }
> + vm.sblk->pv_handle_cpu ^= 1UL << i;
> + }
> + report(!fails, "No wrong cpu handle accepted");
> +
> + uv_destroy_guest(&vm);
> + report_prefix_pop();
> +}
[...]
> +static void run_icpt_122_tests_prefix(unsigned long prefix)
> +{
> + char prfxstr[7];
> + uint32_t *ptr = 0;
> +
> + snprintf(prfxstr, sizeof(prfxstr), "0x%lx", prefix);
> +
> + report_prefix_push(prfxstr);
report_prefix_pushf ?
> + report_prefix_push("unshared");
> + run_icpt_122_tests(prefix);
> + report_prefix_pop();
> +
> + /*
> + * Guest will share the lowcore and we need to check if that
> + * makes a difference (which it should not).
> + */
> + report_prefix_push("shared");
> +
> + sie(&vm);
> + /* Guest indicates that it has been setup via the diag 0x44 */
> + assert(pv_icptdata_check_diag(&vm, 0x44));
> + /* If the pages have not been shared these writes will cause exceptions */
> + ptr = (uint32_t *)prefix;
> + WRITE_ONCE(ptr, 0);
> + ptr = (uint32_t *)(prefix + offsetof(struct lowcore, ars_sa[0]));
> + WRITE_ONCE(ptr, 0);
> +
> + run_icpt_122_tests(prefix);
> +
> + /* shared*/
> + report_prefix_pop();
> + /* prefix hex value */
> + report_prefix_pop();
> +}
[...]
> diff --git a/s390x/snippets/asm/pv-icpt-vir-timing.S b/s390x/snippets/asm/pv-icpt-vir-timing.S
> new file mode 100644
> index 00000000..b35f02c9
> --- /dev/null
> +++ b/s390x/snippets/asm/pv-icpt-vir-timing.S
> @@ -0,0 +1,22 @@
> +/* SPDX-License-Identifier: GPL-2.0-only */
> +/*
> + * Sets a cpu timer which the host can manipulate to check if it will
> + * receive a validity
> + *
> + * Copyright (c) 2023 IBM Corp
> + *
> + * Authors:
> + * Janosch Frank <frankja@xxxxxxxxxxxxx>
> + */
> +.section .text
> +larl %r1, time_val
> +spt 0 (%r1)
> +diag 0, 0, 0x44
> +xgr %r1, %r1
why do you need the xgr?
> +lghi %r1, 42
you're overwriting the whole register here
> +diag 1, 0, 0x9c
> +
> +
> +.align 8
> +time_val:
> + .quad 0x280de80000
> diff --git a/s390x/unittests.cfg b/s390x/unittests.cfg
> index b61faf07..e2d3478e 100644
> --- a/s390x/unittests.cfg
> +++ b/s390x/unittests.cfg
> @@ -218,3 +218,8 @@ extra_params = -append '--parallel'
>
> [execute]
> file = ex.elf
> +
> +[pv-icptcode]
> +file = pv-icptcode.elf
> +smp = 3
> +extra_params = -m 2200
