On 3/15/23 16:54, Nina Schoetterl-Glausch wrote:
The EXECUTE instruction executes the instruction at the given target
address. This address must be halfword aligned, otherwise a
specification exception occurs.
Add a test for this.
Signed-off-by: Nina Schoetterl-Glausch <nsg@xxxxxxxxxxxxx>
Reviewed-by: Janosch Frank <frankja@xxxxxxxxxxxxx>
---
s390x/spec_ex.c | 25 +++++++++++++++++++++++++
1 file changed, 25 insertions(+)
diff --git a/s390x/spec_ex.c b/s390x/spec_ex.c
index 83b8c58e..5fa05dba 100644
--- a/s390x/spec_ex.c
+++ b/s390x/spec_ex.c
@@ -177,6 +177,30 @@ static int short_psw_bit_12_is_0(void)
return 0;
}
+static int odd_ex_target(void)
+{
+ uint64_t pre_target_addr;
+ int to = 0, from = 0x0dd;
+
+ asm volatile ( ".pushsection .text.ex_odd\n"
+ " .balign 2\n"
+ "pre_odd_ex_target:\n"
+ " . = . + 1\n"
+ " lr %[to],%[from]\n"
+ " .popsection\n"
+
+ " larl %[pre_target_addr],pre_odd_ex_target\n"
+ " ex 0,1(%[pre_target_addr])\n"
+ : [pre_target_addr] "=&a" (pre_target_addr),
+ [to] "+d" (to)
+ : [from] "d" (from)
+ );
+
+ assert((pre_target_addr + 1) & 1);
+ report(to != from, "did not perform ex with odd target");
+ return 0;
+}
+
static int bad_alignment(void)
{
uint32_t words[5] __attribute__((aligned(16)));
@@ -218,6 +242,7 @@ static const struct spec_ex_trigger spec_ex_triggers[] = {
{ "psw_bit_12_is_1", &psw_bit_12_is_1, false, &fixup_invalid_psw },
{ "short_psw_bit_12_is_0", &short_psw_bit_12_is_0, false, &fixup_invalid_psw },
{ "psw_odd_address", &psw_odd_address, false, &fixup_invalid_psw },
+ { "odd_ex_target", &odd_ex_target, true, NULL },
{ "bad_alignment", &bad_alignment, true, NULL },
{ "not_even", ¬_even, true, NULL },
{ NULL, NULL, false, NULL },