Hi All, This patch series converts s390's PCI support from its platform specific DMA API implementation in arch/s390/pci/pci_dma.c to the common DMA IOMMU layer. The conversion itself is done in patches 3-4 with patch 2 providing the final necessary IOMMU driver improvement to handle s390's special IOTLB flush out-of-resource indication in virtualized environments. Patches 1-2 can be applied independently. The conversion itself only touches the s390 IOMMU driver and arch code moving over remaining functions from the s390 DMA API implementation. No changes to common code are necessary. After patch 4 the basic conversion is done and on our partitioning machine hypervisor LPAR performance matches or exceeds the existing code. When running under z/VM or KVM however, performance plummets to about half of the existing code due to a much higher rate of IOTLB flushes for unmapped pages. Due to the hypervisors use of IOTLB flushes to synchronize their shadow tables these are very expensive and minimizing them is key for regaining the performance loss. To this end patches 5-7 propose a new, single queue, IOTLB flushing scheme as an alternative to the existing per-CPU flush queues. Introducing an alternative scheme was also suggested by Robin Murphy[1]. In the previous RFC of this conversion Robin suggested reusing more of the existing queuing logic which I incorporated since v2. The single queue mode is introduced in patch 5. It allows batching a much larger number of lazily freed IOVAs and was also chosen as hypervisors tend to serialize IOTLB flushes removing some of the gains of multiple queues. Except for going from one per-CPU to a global queue the queue logic remains untouched. Then patch 6 enables variable queue sizes using power of 2 queue sizes and shift/mask to keep performance as close to the existing code as possible. After this patch 7 introdues an IOMMU operation to automatically pick between the existing per-CPU and new single queue flushing schemes on a per device basis and utilizes this to enable single queue mode for PCI devices on s390 that require IOTLB flushes on map indicating expensive shadowing. As it is implemented in common code the single queue IOTLB flushing scheme can of course be used by other platforms with expensive IOTLB flushes. Particularly virtio-iommu may be a candidate. I did verify that the new scheme does work on my x86_64 Ryzen workstation by locally modifying drivers/iommu/iommu.c:iommu_subsys_init() to default to the single queue mode and verifying its use via "/sys/.../iommu_group/type". I did not find problems with an AMD GPU, Intel NIC (with SR-IOV and KVM pass-through), NVMes or any on board peripherals. As with previous series this is available via my git.kernel.org tree[3] in the dma_iommu_v4 branch with signed s390_dma_iommu_v4 tag. Thanks to previous IOMMU changes merged with v6.2-rc1 this does apply directly on v6.2-rc2 now. NOTE: Due to the large drop in performance I think we should not merge the DMA API conversion (patches 3-4) until we have a more suited IOVA flushing scheme with similar improvements as the proposed changes of patches 5-7. Best regards, Niklas [0] https://lore.kernel.org/linux-iommu/20221109142903.4080275-1-schnelle@xxxxxxxxxxxxx/ [1] https://lore.kernel.org/linux-iommu/3e402947-61f9-b7e8-1414-fde006257b6f@xxxxxxx/ [2] https://lore.kernel.org/linux-iommu/a8e778da-7b41-a6ba-83c3-c366a426c3da@xxxxxxx/ [3] https://git.kernel.org/pub/scm/linux/kernel/git/niks/linux.git/ Changes since v3: - Reword commit message of patch 2 for more clarity - Correct typo in comment added by patch 2 (Alexandra) - Adapted signature of .iommu_tlb_sync mapo for sun50i IOMMU driver added in v6.2-rc1 (kernel test robot) - Add R-b from Alexandra for patch 1 Changes since v2: - Move the IOTLB out-of-resource handling into the IOMMU enabling it also for the IOMMU API (patch 2). This also makes this independent from the DMA API conversion (Robin, Jason). - Rename __IOMMU_DOMAIN_DMA_FQ to __IOMMU_DOMAIN_DMA_LAZY when introducing single queue flushing mode. - Make selecting between single and per-CPU flush queues an explicit IOMMU op (patch 7) Changes since RFC v1: - Patch 1 uses dma_set_mask_and_coherent() (Christoph) - Patch 3 now documents and allows the use of iommu.strict=0|1 on s390 and deprecates s390_iommu=strict while making it an alias. - Patches 5-7 completely reworked to reuse existing queue logic (Robin) - Added patch 4 to allow using iommu.strict=0|1 to override ops->def_domain_type. Niklas Schnelle (7): s390/ism: Set DMA coherent mask iommu: Allow .iotlb_sync_map to fail and handle s390's -ENOMEM return s390/pci: prepare is_passed_through() for dma-iommu s390/pci: Use dma-iommu layer iommu/dma: Allow a single FQ in addition to per-CPU FQs iommu/dma: Enable variable queue size and use larger single queue iommu/dma: Add IOMMU op to choose lazy domain type .../admin-guide/kernel-parameters.txt | 9 +- arch/s390/include/asm/pci.h | 7 - arch/s390/include/asm/pci_dma.h | 120 +-- arch/s390/pci/Makefile | 2 +- arch/s390/pci/pci.c | 22 +- arch/s390/pci/pci_bus.c | 5 - arch/s390/pci/pci_debug.c | 13 +- arch/s390/pci/pci_dma.c | 732 ------------------ arch/s390/pci/pci_event.c | 17 +- arch/s390/pci/pci_sysfs.c | 19 +- drivers/iommu/Kconfig | 4 +- drivers/iommu/amd/iommu.c | 5 +- drivers/iommu/apple-dart.c | 5 +- drivers/iommu/dma-iommu.c | 184 ++++- drivers/iommu/intel/iommu.c | 5 +- drivers/iommu/iommu.c | 48 +- drivers/iommu/msm_iommu.c | 5 +- drivers/iommu/mtk_iommu.c | 5 +- drivers/iommu/s390-iommu.c | 430 +++++++++- drivers/iommu/sprd-iommu.c | 5 +- drivers/iommu/sun50i-iommu.c | 4 +- drivers/iommu/tegra-gart.c | 5 +- drivers/s390/net/ism_drv.c | 2 +- include/linux/iommu.h | 23 +- 24 files changed, 678 insertions(+), 998 deletions(-) delete mode 100644 arch/s390/pci/pci_dma.c -- 2.34.1
