> > > Right, that's exactly what I had at one point. I thought it was too > > > cumbersome, but maybe not. Will dust it off, pending my question to > > > Janosch about 0-vs-1 IOCTLs. > > > > As we really only care about the SIGP STOP case, > > Is that really true? SIGP RESTART does an inject back to KVM, ditto the > (INITIAL) CPU RESET orders. It's true that SIGP SENSE is getting > tripped up on whether a vcpu is actually stopped or not, but I believe > that SIGP SENSE saying "everything's fine" when a vcpu is still busy processing an order isn't great either. The general rule is "if the guest can detect that it violates the spec, it needs fixing". That is true right now when a single VCPU does: #1: SIGP STOP AND STORE #2 #1: SIGP SENSE #2 Because according to the spec, the SIGP SENSE has to return either BUSY or indicated STOPPED. And if it indicates STOPPED, the STORE has to be fully processed. Can you construct something similar with SIGP INITIAL CPU RESET and e.g., SIGP SENSE? From a single CPU not: #1: SIGP INITIAL CPU RESET #2 #1: SIGP SENSE #2 As the SIGP INITIAL CPU RESET is processed fully asynchronous. Can you come up with an example where using another VCPU we could reliably detect a difference between #1: SIGP INITIAL CPU RESET #2 #3: SIGP SENSE #2 and #3: SIGP SENSE #2 #1: SIGP INITIAL CPU RESET #2 and #3: SIGP SENSE #2 [and concurrent] #1: SIGP INITIAL CPU RESET #2 If yes, it needs fixing, if not, we can happily ignore it.
