On Wed, 22 Sep 2021 07:18:10 +0000
Janosch Frank <frankja@xxxxxxxxxxxxx> wrote:
> On success r2 + 1 should be 0, let's also check for that.
>
> Signed-off-by: Janosch Frank <frankja@xxxxxxxxxxxxx>
Reviewed-by: Claudio Imbrenda <imbrenda@xxxxxxxxxxxxx>
but see comment below
> ---
> s390x/sthyi.c | 20 +++++++++++---------
> 1 file changed, 11 insertions(+), 9 deletions(-)
>
> diff --git a/s390x/sthyi.c b/s390x/sthyi.c
> index db90b56f..4b153bf4 100644
> --- a/s390x/sthyi.c
> +++ b/s390x/sthyi.c
> @@ -24,16 +24,16 @@ static inline int sthyi(uint64_t vaddr, uint64_t fcode, uint64_t *rc,
> {
> register uint64_t code asm("0") = fcode;
> register uint64_t addr asm("2") = vaddr;
> - register uint64_t rc3 asm("3") = 0;
> + register uint64_t rc3 asm("3") = 42;
I am not a big fan of the asm constraints, in the kernel we are
trying to move away from them, but I guess as long as it works it's ok
> int cc = 0;
>
> - asm volatile(".insn rre,0xB2560000,%[r1],%[r2]\n"
> - "ipm %[cc]\n"
> - "srl %[cc],28\n"
> - : [cc] "=d" (cc)
> - : [code] "d" (code), [addr] "a" (addr), [r1] "i" (r1),
> - [r2] "i" (r2)
> - : "memory", "cc", "r3");
> + asm volatile(
> + ".insn rre,0xB2560000,%[r1],%[r2]\n"
> + "ipm %[cc]\n"
> + "srl %[cc],28\n"
> + : [cc] "=d" (cc), "+d" (rc3)
> + : [code] "d" (code), [addr] "a" (addr), [r1] "i" (r1), [r2] "i" (r2)
> + : "memory", "cc");
> if (rc)
> *rc = rc3;
> return cc;
> @@ -139,16 +139,18 @@ static void test_fcode0(void)
> struct sthyi_hdr_sctn *hdr;
> struct sthyi_mach_sctn *mach;
> struct sthyi_par_sctn *par;
> + uint64_t rc = 42;
>
> /* Zero destination memory. */
> memset(pagebuf, 0, PAGE_SIZE);
>
> report_prefix_push("fcode 0");
> - sthyi((uint64_t)pagebuf, 0, NULL, 0, 2);
> + sthyi((uint64_t)pagebuf, 0, &rc, 0, 2);
> hdr = (void *)pagebuf;
> mach = (void *)pagebuf + hdr->INFMOFF;
> par = (void *)pagebuf + hdr->INFPOFF;
>
> + report(!rc, "r2 + 1 == 0");
> test_fcode0_hdr(hdr);
> test_fcode0_mach(mach);
> test_fcode0_par(par);
