On Thu, Aug 12 2021, Pierre Morel <pmorel@xxxxxxxxxxxxx> wrote:
> On 8/12/21 2:56 PM, Cornelia Huck wrote:
>> On Tue, Aug 10 2021, Pierre Morel <pmorel@xxxxxxxxxxxxx> wrote:
>>
>>> The maximum CPU Topology nested level is available with the SCLP
>>> READ_INFO command inside the byte at offset 15 of the ReadInfo
>>> structure.
>>>
>>> Let's return this information to check the number of topology nested
>>> information available with the STSI 15.1.x instruction.
>>>
>>> Signed-off-by: Pierre Morel <pmorel@xxxxxxxxxxxxx>
>>> Reviewed-by: Claudio Imbrenda <imbrenda@xxxxxxxxxxxxx>
>>> ---
>>> lib/s390x/sclp.c | 6 ++++++
>>> lib/s390x/sclp.h | 4 +++-
>>> 2 files changed, 9 insertions(+), 1 deletion(-)
>>>
>>> diff --git a/lib/s390x/sclp.c b/lib/s390x/sclp.c
>>> index 9502d161..ee379ddf 100644
>>> --- a/lib/s390x/sclp.c
>>> +++ b/lib/s390x/sclp.c
>>> @@ -123,6 +123,12 @@ int sclp_get_cpu_num(void)
>>> return read_info->entries_cpu;
>>> }
>>>
>>> +int sclp_get_stsi_parm(void)
>>> +{
>>> + assert(read_info);
>>> + return read_info->stsi_parm;
>>
>> Is this a generic "stsi parm", or always the concrete topology nested
>> level? IOW, is that name good, or too generic?
>
> It is the name used in the documentation, but for now only the 3 bits
> 5-7 are used for the maximum value of the selector 2 of the STSI
> instruction allowed by the machine.
Ok.
Reviewed-by: Cornelia Huck <cohuck@xxxxxxxxxx>
