The efpc stores in bits 32-63 of a register and we store a full 8 bytes to have the stack 8 byte aligned. This means that the fpc is stored at offset 4 but we load it from offset 0. Lets replace efpc with stfpc and get rid of the stg to store at offset 0. Signed-off-by: Janosch Frank <frankja@xxxxxxxxxxxxx> Reviewed-by: Claudio Imbrenda <imbrenda@xxxxxxxxxxxxx> Reviewed-by: Pierre Morel <pmorel@xxxxxxxxxxxxx> Reviewed-by: Thomas Huth <thuth@xxxxxxxxxx> --- s390x/macros.S | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/s390x/macros.S b/s390x/macros.S index 37a6a63e..e51a557a 100644 --- a/s390x/macros.S +++ b/s390x/macros.S @@ -54,8 +54,7 @@ .endr /* Save fpc, but keep stack aligned on 64bits */ slgfi %r15, 8 - efpc %r0 - stg %r0, 0(%r15) + stfpc 0(%r15) .endm /* Restore the register in reverse order */ -- 2.25.1
