On Wed, 9 Dec 2020 15:27:47 -0500
Matthew Rosato <mjrosato@xxxxxxxxxxxxx> wrote:
> Some zpci device types (e.g., ISM) follow different rules for length
> and alignment of pci instructions. Recognize this and keep track of
> it in the zpci_dev.
>
> Signed-off-by: Matthew Rosato <mjrosato@xxxxxxxxxxxxx>
> Reviewed-by: Niklas Schnelle <schnelle@xxxxxxxxxxxxx>
> Reviewed-by: Pierre Morel <pmorel@xxxxxxxxxxxxx>
> ---
> arch/s390/include/asm/pci.h | 3 ++-
> arch/s390/include/asm/pci_clp.h | 4 +++-
> arch/s390/pci/pci_clp.c | 1 +
> 3 files changed, 6 insertions(+), 2 deletions(-)
>
> diff --git a/arch/s390/include/asm/pci.h b/arch/s390/include/asm/pci.h
> index 2126289..f16ffba 100644
> --- a/arch/s390/include/asm/pci.h
> +++ b/arch/s390/include/asm/pci.h
> @@ -133,7 +133,8 @@ struct zpci_dev {
> u8 has_hp_slot : 1;
> u8 is_physfn : 1;
> u8 util_str_avail : 1;
> - u8 reserved : 4;
> + u8 relaxed_align : 1;
> + u8 reserved : 3;
> unsigned int devfn; /* DEVFN part of the RID*/
>
> struct mutex lock;
> diff --git a/arch/s390/include/asm/pci_clp.h b/arch/s390/include/asm/pci_clp.h
> index 1f4b666..9fb7cbf 100644
> --- a/arch/s390/include/asm/pci_clp.h
> +++ b/arch/s390/include/asm/pci_clp.h
> @@ -150,7 +150,9 @@ struct clp_rsp_query_pci_grp {
> u16 : 4;
> u16 noi : 12; /* number of interrupts */
> u8 version;
> - u8 : 6;
> + u8 : 4;
> + u8 relaxed_align : 1; /* Relax length and alignment rules */
> + u8 : 1;
> u8 frame : 1;
> u8 refresh : 1; /* TLB refresh mode */
> u16 reserved2;
> diff --git a/arch/s390/pci/pci_clp.c b/arch/s390/pci/pci_clp.c
> index 153720d..630f8fc 100644
> --- a/arch/s390/pci/pci_clp.c
> +++ b/arch/s390/pci/pci_clp.c
> @@ -103,6 +103,7 @@ static void clp_store_query_pci_fngrp(struct zpci_dev *zdev,
> zdev->max_msi = response->noi;
> zdev->fmb_update = response->mui;
> zdev->version = response->version;
> + zdev->relaxed_align = response->relaxed_align;
>
> switch (response->version) {
> case 1:
Hm, what does that 'relaxed alignment' imply? Is that something that
can apply to emulated devices as well?
