If we use multiple source of interrupts, for exemple, using SCLP console to print information while using I/O interrupts, we need to have a re-entrant register saving interruption handling. Instead of saving at a static memory address, let's save the base registers and the floating point registers on the stack. Note that we keep the static register saving to recover from the RESET tests. Signed-off-by: Pierre Morel <pmorel@xxxxxxxxxxxxx> --- s390x/cstart64.S | 25 +++++++++++++++++++++++-- 1 file changed, 23 insertions(+), 2 deletions(-) diff --git a/s390x/cstart64.S b/s390x/cstart64.S index 86dd4c4..ff05f9b 100644 --- a/s390x/cstart64.S +++ b/s390x/cstart64.S @@ -118,6 +118,25 @@ memsetxc: lmg %r0, %r15, GEN_LC_SW_INT_GRS .endm + .macro SAVE_IRQ_REGS + slgfi %r15, 15 * 8 + stmg %r0, %r14, 0(%r15) + slgfi %r15, 16 * 8 + .irp i, 0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15 + std \i, \i * 8(%r15) + .endr + lgr %r2, %r15 + .endm + + .macro RESTORE_IRQ_REGS + .irp i, 0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15 + ld \i, \i * 8(%r15) + .endr + algfi %r15, 16 * 8 + lmg %r0, %r14, 0(%r15) + algfi %r15, 15 * 8 + .endm + .section .text /* * load_reset calling convention: @@ -154,6 +173,8 @@ diag308_load_reset: lpswe GEN_LC_SW_INT_PSW 1: br %r14 + + .globl smp_cpu_setup_state smp_cpu_setup_state: xgr %r1, %r1 @@ -180,9 +201,9 @@ mcck_int: lpswe GEN_LC_MCCK_OLD_PSW io_int: - SAVE_REGS + SAVE_IRQ_REGS brasl %r14, handle_io_int - RESTORE_REGS + RESTORE_IRQ_REGS lpswe GEN_LC_IO_OLD_PSW svc_int: -- 2.17.0
