On Mon, Jan 20, 2014 at 09:15:45PM -0500, Mike Frysinger wrote:
> since linux-3.10, i can no longer boot when CONFIG_64BIT=n. using the config
> that works on 3.9.11, i've tried 3.10, 3.11, 3.12, and 3.13 and they all blow
> up on boot. the crash from 3.13 is below. see attached config.
CONFIG_64BIT=n is not really well *cough* tested. Is there any reason why you
don't use a 64 bit kernel with config compat turned on?
That should work, since I also use a complete 32 bit user space distro with
a 64 bit compat kernel.
Anyway,
> oddly, i tried enabling extended debugging options under Lock Debugging and
> the system does boot. but then some things run oddly at runtime like the
With lockdep the lockref code won't use the cmpxchg64 on 32 bit which is
completely broken.
> statfs64() syscall returning errors (using `df` -- same binary works under
> older kernels).
Ok, I'll look into that later.
> ------------[ cut here ]------------
> Kernel BUG at 0029abd6 [verbose debug info unavailable]
> specification exception: 0006 [#1] SMP
> Modules linked in:
> CPU: 0 PID: 0 Comm: swapper/0 Not tainted 3.13.0 #4
> task: 005a16c8 ti: 00592000 task.ti: 00592000
> Krnl PSW : 070ce000 8029abd6 (lockref_get+0x3e/0x9c)
> R:0 T:1 IO:1 EX:1 Key:0 M:1 W:0 P:0 AS:3 CC:2 PM:0
> Krnl GPRS: 00000000 00000002 00000001 00000000
> 00000000 00000001 78f05a60 00000000
> 004b6b7e 00400000 78f05a60 78e01870
> 78e018c0 0041c038 00593e28 00593e08
> Krnl Code: 8029abcc: a71a0001 ahi %r1,1
> 8029abd0: 1852 lr %r5,%r2
> #8029abd2: bb40f064 cds %r4,%r0,100(%r15)
> >8029abd6: 1943 cr %r4,%r3
Yep, that's a compare and swap on not proper aligned address on
the stack. Which indicates that our cmpxhg64 on 32 bit is broken
in multiple ways.
The patch below will fix this crash, but not the statfs issue.
diff --git a/arch/s390/include/asm/cmpxchg.h b/arch/s390/include/asm/cmpxchg.h
index 0f636cbdf342..6650a9064a8c 100644
--- a/arch/s390/include/asm/cmpxchg.h
+++ b/arch/s390/include/asm/cmpxchg.h
@@ -185,11 +185,12 @@ static inline unsigned long long __cmpxchg64(void *ptr,
{
register_pair rp_old = {.pair = old};
register_pair rp_new = {.pair = new};
+ unsigned long long *ullptr = ptr;
asm volatile(
" cds %0,%2,%1"
- : "+&d" (rp_old), "=Q" (ptr)
- : "d" (rp_new), "Q" (ptr)
+ : "+&d" (rp_old), "+Q" (*ullptr)
+ : "d" (rp_new)
: "memory", "cc");
return rp_old.pair;
}
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