From: Claudiu Beznea <claudiu.beznea.uj@xxxxxxxxxxxxxx> Document the RTC IP (RTCA-3) available on the Renesas RZ/G3S SoC. Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@xxxxxxxxxxxxxx> --- .../bindings/rtc/renesas,rzg3s-rtc.yaml | 60 +++++++++++++++++++ 1 file changed, 60 insertions(+) create mode 100644 Documentation/devicetree/bindings/rtc/renesas,rzg3s-rtc.yaml diff --git a/Documentation/devicetree/bindings/rtc/renesas,rzg3s-rtc.yaml b/Documentation/devicetree/bindings/rtc/renesas,rzg3s-rtc.yaml new file mode 100644 index 000000000000..0e17f8a36155 --- /dev/null +++ b/Documentation/devicetree/bindings/rtc/renesas,rzg3s-rtc.yaml @@ -0,0 +1,60 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/rtc/renesas,rzg3s-rtc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Real Time Clock for Renesas RZ/G3S SoC + +maintainers: + - Claudiu Beznea <claudiu.beznea.uj@xxxxxxxxxxxxxx> + +properties: + compatible: + const: renesas,rzg3s-rtc + + reg: + maxItems: 1 + + interrupts: + maxItems: 3 + + interrupt-names: + items: + - const: alarm + - const: period + - const: carry + + clocks: + maxItems: 1 + description: RTC counter clock + + clock-names: + maxItems: 1 + +required: + - compatible + - reg + - interrupts + - interrupt-names + - clocks + - clock-names + +additionalProperties: false + +examples: + - | + #include <dt-bindings/interrupt-controller/arm-gic.h> + #include <dt-bindings/interrupt-controller/irq.h> + + rtc: rtc@1004ec00 { + compatible = "renesas,rzg3s-rtc"; + reg = <0x1004ec00 0x400>; + interrupts = <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "alarm", "period", "carry"; + clocks = <&vbattclk>; + clock-names = "counter"; + status = "disabled"; + }; -- 2.39.2