Add RAM controller, shutdown controller & SFR DT bindings.
Signed-off-by: Varshini Rajendran <varshini.rajendran@xxxxxxxxxxxxx>
---
Documentation/devicetree/bindings/arm/atmel-sysregs.txt | 7 ++++---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/Documentation/devicetree/bindings/arm/atmel-sysregs.txt b/Documentation/devicetree/bindings/arm/atmel-sysregs.txt
index ab1b352344ae..1e7349987d77 100644
--- a/Documentation/devicetree/bindings/arm/atmel-sysregs.txt
+++ b/Documentation/devicetree/bindings/arm/atmel-sysregs.txt
@@ -11,7 +11,7 @@ PIT Timer required properties:
shared across all System Controller members.
PIT64B Timer required properties:
-- compatible: Should be "microchip,sam9x60-pit64b"
+- compatible: Should be "microchip,sam9x60-pit64b" or "microchip,sam9x7-pit64b"
- reg: Should contain registers location and length
- interrupts: Should contain interrupt for PIT64B timer
- clocks: Should contain the available clock sources for PIT64B timer.
@@ -31,6 +31,7 @@ RAMC SDRAM/DDR Controller required properties:
"atmel,at91sam9g45-ddramc",
"atmel,sama5d3-ddramc",
"microchip,sam9x60-ddramc",
+ "microchip,sam9x7-ddramc",
"microchip,sama7g5-uddrc"
- reg: Should contain registers location and length
@@ -89,7 +90,7 @@ SHDWC SAMA5D2-Compatible Shutdown Controller
required properties:
- compatible: should be "atmel,sama5d2-shdwc", "microchip,sam9x60-shdwc" or
- "microchip,sama7g5-shdwc"
+ "microchip,sama7g5-shdwc" or "microchip,sam9x7-shdwc"
- reg: should contain registers location and length
- clocks: phandle to input clock.
- #address-cells: should be one. The cell is the wake-up input index.
@@ -156,7 +157,7 @@ required properties:
- compatible: Should be "atmel,<chip>-sfr", "syscon" or
"atmel,<chip>-sfrbu", "syscon"
<chip> can be "sama5d3", "sama5d4" or "sama5d2".
- It also can be "microchip,sam9x60-sfr", "syscon".
+ It also can be "microchip,sam9x60-sfr" or "microchip,sam9x7-sfr", "syscon".
- reg: Should contain registers location and length
sfr@f0038000 {
--
2.25.1
