Hi Neil,
On Thu, Feb 9, 2023 at 2:41 PM Neil Armstrong <neil.armstrong@xxxxxxxxxx> wrote:
>
> Document the System Control registers regions found on all Amlogic
> SoC families and it's clock, power, pinctrl and phy subnodes.
I understand clock (main clock controller) power (power domain
controller) and PHY (HDMI and CVBS PHYs). Are you sure about pinctrl?
[...]
> +properties:
> + compatible:
> + items:
> + - enum:
> + - amlogic,meson-gx-hhi-sysctrl
> + - amlogic,meson-gx-ao-sysctrl
> + - amlogic,meson-axg-hhi-sysctrl
> + - amlogic,meson-axg-ao-sysctrl
If you have to re-send this then it would be great if you could add:
- amlogic,meson-hhi-sysctrl
because we already have that in arch/arm/boot/dts/meson.dtsi for the
32-bit SoCs.
[...]
> + power-controller {
> + compatible = "amlogic,meson-gxbb-pwrc";
> + #power-domain-cells = <1>;
> + amlogic,ao-sysctrl = <&sysctrl_AO>;
For this node (and similar ones) I have a question to the device-tree
maintainers:
The power controller has a dedicated sub-range of registers. This also
applies to the CVBS and HDMI PHYs.
But the clock controller does not (it has its registers all over the
place - unfortunately that's how the hardware is).
I have been asked to add a "reg" property to child nodes with a
sub-register space.
Does this mean we need to add a reg property here as well (regardless
of whether we're using it in the driver or not)? And what to do in
case of the clock controller though?
Best regards,
Martin
