On Mon, Feb 06, 2023 at 07:12:43PM -0800, David Collins wrote:
> On 2/2/23 07:54, Johan Hovold wrote:
> > Make sure to disable the alarm before updating the four alarm time
> > registers to avoid spurious alarms during the update.
>
> What scenario can encounter a spurious alarm triggering upon writing the
> new alarm time inside of pm8xxx_rtc_set_alarm()?
The alarm is stored in four bytes in little-endian order. Consider
having had an alarm set and expired at:
00 01 00 00
and now you want to set an alarm at
01 02 00 00
Unless the alarm is disabled before the update the alarm could go off at
01 01 00 00
after updating the first byte.
> > Note that the disable needs to be done outside of the ctrl_reg_lock
> > section to prevent a racing alarm interrupt from disabling the newly set
> > alarm when the lock is released.
>
> What scenario shows the IRQ race issue that you mentioned? How does not
> protecting this register write with a lock avoid the race condition?
If a previously set alarm goes off after disabling interrupts but before
disabling the alarm inside the critical section, then that interrupt
could be serviced as soon as interrupts are re-enabled and the handler
would disable the newly set alarm.
> > Fixes: 9a9a54ad7aa2 ("drivers/rtc: add support for Qualcomm PMIC8xxx RTC")
> > Cc: stable@xxxxxxxxxxxxxxx # 3.1
> > Signed-off-by: Johan Hovold <johan+linaro@xxxxxxxxxx>
> > ---
> > drivers/rtc/rtc-pm8xxx.c | 24 ++++++++++--------------
> > 1 file changed, 10 insertions(+), 14 deletions(-)
>
> Note that since locking is removed later in the patch series, my
> questions above are mainly for the sake of curiosity.
Johan
