On Fri, Jan 27, 2023 at 02:13:21PM +0000, Srinivas Kandagatla wrote:
> On 26/01/2023 14:20, Johan Hovold wrote:
> > On many Qualcomm platforms the PMIC RTC control and time registers are
> > read-only so that the RTC time can not be updated. Instead an offset
> > needs be stored in some machine-specific non-volatile memory, which the
> > driver can take into account.
> >
> > Add support for storing a 32-bit offset from the Epoch in an nvmem cell
> > so that the RTC time can be set on such platforms.
> >
> > Signed-off-by: Johan Hovold <johan+linaro@xxxxxxxxxx>
> > ---
> > drivers/rtc/rtc-pm8xxx.c | 134 +++++++++++++++++++++++++++++++++++----
> > 1 file changed, 123 insertions(+), 11 deletions(-)
> >
> > diff --git a/drivers/rtc/rtc-pm8xxx.c b/drivers/rtc/rtc-pm8xxx.c
> > index 922aef0f0241..09816b9f6282 100644
> > --- a/drivers/rtc/rtc-pm8xxx.c
> > +++ b/drivers/rtc/rtc-pm8xxx.c
> > @@ -3,6 +3,7 @@
> > */
> > +static int pm8xxx_rtc_read_nvmem_offset(struct pm8xxx_rtc *rtc_dd)
> > +{
> > + size_t len;
> > + void *buf;
> > + int rc;
> > +
> > + buf = nvmem_cell_read(rtc_dd->nvmem_cell, &len);
> > + if (IS_ERR(buf)) {
> > + rc = PTR_ERR(buf);
> > + dev_err(rtc_dd->dev, "failed to read nvmem offset: %d\n", rc);
> > + return rc;
> > + }
> > +
> > + if (len != sizeof(u32)) {
> > + dev_err(rtc_dd->dev, "unexpected nvmem cell size %zu\n", len);
> > + kfree(buf);
> > + return -EINVAL;
> > + }
> how about us nvmem_cell_read_u32()
I considered that, but did not like the asymmetry of the interface.
Specifically, nvmem_cell_read_u32() would go out and look up the nvmem
cell again even though I already have and need a reference for
nvmem_cell_write().
nvmem_cell_read_u32() seems to be a better fit as a convenience wrapper
for drivers that only need to do a single read at probe.
Johan
